TSOP−6

CASE 318G−02

ISSUE V

DATE 12 JUN 2012

SCALE 2:1

STYLE 1:

PIN 1. DRAIN

2. DRAIN

3. GATE

4. SOURCE

5. DRAIN

6. DRAIN

23

4

5

6

D

1

e

b

E1

A1

A

0.05

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM

LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.

4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,

PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR

GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D

AND E1 ARE DETERMINED AT DATUM H.

5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE.

c

STYLE 2:

PIN 1. EMITTER 2

2. BASE 1

3. COLLECTOR 1

4. EMITTER 1

5. BASE 2

6. COLLECTOR 2

STYLE 3:

PIN 1. ENABLE

2. N/C

3. R BOOST

4. Vz

5. V in

6. V out

STYLE 4:

PIN 1. N/C

2. V in

3. NOT USED

4. GROUND

5. ENABLE

6. LOAD

XXX MG

G

XXX = Specific Device Code

A

=Assembly Location

Y

= Year

W

= Work Week

G

= Pb−Free Package

STYLE 5:

PIN 1. EMITTER 2

2. BASE 2

3. COLLECTOR 1

4. EMITTER 1

5. BASE 1

6. COLLECTOR 2

STYLE 6:

PIN 1. COLLECTOR

2. COLLECTOR

3. BASE

4. EMITTER

5. COLLECTOR

6. COLLECTOR

STYLE 7:

PIN 1. COLLECTOR

2. COLLECTOR

3. BASE

4. N/C

5. COLLECTOR

6. EMITTER

STYLE 8:

PIN 1. Vbus

2. D(in)

3. D(in)+

4. D(out)+

5. D(out)

6. GND

GENERIC

MARKING DIAGRAM*

STYLE 9:

PIN 1. LOW VOLTAGE GATE

2. DRAIN

3. SOURCE

4. DRAIN

5. DRAIN

6. HIGH VOLTAGE GATE

STYLE 10:

PIN 1. D(OUT)+

2. GND

3. D(OUT)−

4. D(IN)−

5. VBUS

6. D(IN)+

1

1

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

STYLE 11:

PIN 1. SOURCE 1

2. DRAIN 2

3. DRAIN 2

4. SOURCE 2

5. GATE 1

6. DRAIN 1/GATE 2

STYLE 12:

PIN 1. I/O

2. GROUND

3. I/O

4. I/O

5. VCC

6. I/O

*This information is generic. Please refer to device data sheet

for actual part marking. Pb−Free indicator, “G” or microdot “

G”, may or may not be present.

XXXAYWG

G

1

STANDARD

IC

XXX = Specific Device Code

M

= Date Code

G

= Pb−Free Package

DIM

A

MIN

NOM

MAX

MILLIMETERS

0.90

1.00

1.10

A1

0.01

0.06

0.10

b

0.25

0.38

0.50

c

0.10

0.18

0.26

D

2.90

3.00

3.10

E

2.50

2.75

3.00

e

0.85

0.95

1.05

L

0.20

0.40

0.60

0.25 BSC

L2

−

0

°

10°

STYLE 13:

PIN 1. GATE 1

2. SOURCE 2

3. GATE 2

4. DRAIN 2

5. SOURCE 1

6. DRAIN 1

STYLE 14:

PIN 1. ANODE

2. SOURCE

3. GATE

4. CATHODE/DRAIN

5. CATHODE/DRAIN

6. CATHODE/DRAIN

STYLE 15:

PIN 1. ANODE

2. SOURCE

3. GATE

4. DRAIN

5. N/C

6. CATHODE

1.30

1.50

1.70

E1

E

RECOMMENDED

NOTE 5

L

C

M

H

L2

SEATING

PLANE

GAUGE

PLANE

DETAIL Z

DETAIL Z

0.60

6X

3.20

0.95

6X

0.95

PITCH

DIMENSIONS: MILLIMETERS

M

STYLE 16:

PIN 1. ANODE/CATHODE

2. BASE

3. EMITTER

4. COLLECTOR

5. ANODE

6. CATHODE

STYLE 17:

PIN 1. EMITTER

2. BASE

3. ANODE/CATHODE

4. ANODE

5. CATHODE

6. COLLECTOR

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

ON Semiconductor and

are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding

the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically

disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the

rights of others.

98ASB14888C

DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

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TSOP−6

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