R1163x

8

ELECTRICAL CHARACTERISTICS by OUTPUT VOLTAGE

Topt

25C

Output Voltage

VOUT (V)

Dropout Voltage (mV)

Condition

VDIF (FT Mode)

VDIF (LP Mode)

Typ.

Max.

Typ.

Max.

1.5  

 VOUT < 1.6

IOUT

150mA

400

680

420

680

1.6  

 VOUT < 1.7

380

550

390

550

1.7  

 VOUT < 1.8

350

520

370

520

1.8  

 VOUT < 2.0

340

490

350

490

2.0  

 VOUT < 2.8

290

425

300

430

2.8  

 VOUT  

 5.0

250

350

250

350

TYPICAL APPLICATION

C1

R1163x

Series

VDD

VOUT

CE

GND

VOUT

ECO

C2

External Components)

Ex. C1: Ceramic Capacitor 1.0

F

C2: Ceramic Capacitor 0.47

F Murata GRM40B474K

Kyocera CM105B474K

TECHNICAL NOTES

When using these ICs, consider the following points:

Phase Compensation

In these ICs, phase compensation is made for securing stable operation even if the load current is varied. For

this purpose, be sure to use a 0.47

F or more ceramic capacitor C2.

(Test these ICs with as same external components as ones to be used on the PCB.)

When a tantalum capacitor is used with this IC, if the equivalent series resistor (ESR) of the capacitor is large,

output voltage may be unstable.

PCB Layout

Make VDD and GND lines sufficient. If their impedance is high, noise pickup or unstable operation may result.

Connect a capacitor C1 with as much as 1.0

F capacitor between VDD and GND pin as close as possible.

Set external components such as an output capacitor C2, as close as possible to the ICs and make wiring as

short as possible.

R1163K (DFN(PLP)1616-6) is the non-promotional product as of March 2019.