Document Number: 37007

Revision 24-Nov-00

www.vishay.com

2

APD-128G032A

Vishay Dale

Plasma Display Modules

128 x 32 Graphics Display with Drive Electronics

TTL Level Data Interface and Integrated DC Converter

FEATURES

• TTL level video interface

• Large characters

• Highly visible for long distance viewing

• Slim profile

•

> 30:1 contrast ratio

• On board DC/DC converter

• Bright and pleasant neon orange color

• Very affordable

OPTICAL SPECIFICATIONS

Viewing Area: 12.75" [323.8mm] W x 3.15" [80.01mm] L.

Character Array: (8 x 8) 16 x 4. (6 x 8) 21 x 4.

Character Size: 0.65" [16.51mm] H x 0.45" [11.43mm] W.

Pixel Size: 0.050" [1.27mm].

Pixel Pitch: 0.100" [2.54mm].

Luminance: 50 foot lamberts.

ELECTRICAL SPECIFICATIONS

Voltage(s) Required: VDC: + 12 to + 24 VDC. Vcc: + 5 VDC.

Power Required: Typical = 12 watts. Maximum = 45 watts.

The APD-128G032A DC plasma display offers viewing qualities designers seek such as high contrast, viewing angle of 150

°

minimum and long distance readability. Its bright (50 foot Lambert minimum) with characters and graphics figures presented

in a pleasing neon orange color against a black background. Plasma is much more readable and eye-pleasing than liquid

crystal or vacuum fluorescent displays and is filterable to red, amber or neutral density.

These plasma display panels are driven in a standard row-column refresh method much like a CRT display. The designer

need only supply TTL level signals for SERIAL DATA, DOT CLOCK, COLUMN LATCH, ROW DATA, ROW CLOCK and

DISPLAY ENABLE. The SERIAL DATA is entered with the DOT CLOCK up to frequencies as high as 8MHz. After a row of

128 pixels is clocked in, the COLUMN LATCH signal is toggled and the data is latched. At the time the data is latched, the

display is briefly disabled using the DISPLAY ENABLE signal, then the row pointer is advanced with the ROW CLOCK

signal. Once each frame the ROW DATA must be asserted to synchronize the column serial data with the beginning row.

The recommended scanning frequency is approximately 70Hz, but may be as high as 200Hz. The high clock rate on the

data clock allows for rapid refresh and maximum access time to the refresh ram.

ORDERING INFORMATION

DESCRIPTION

PART NUMBER

Display Module with Drivers, TTL Interface and On Board DC Converter ......................................................................... APD-128G032A

Power Connector ........................................................................................................................................................................ 280108-13

Data Connector ........................................................................................................................................................................... 280105-05

STANDARD ELECTRICAL SPECIFICATIONS*

*Recommended operating voltages. All maximums are absolute maximum.

DESCRIPTION

SYMBOL

MIN.

TYP.

MAX.

UNITS

DC converter input

VDC

+ 10.0

+ 24.0

+ 28.0

VDC

DC converter power

Amps

Screen Clear

50% Lit

100% Lit

@ + 12 V

0.100

1.7

3.5

Logic 1 input

Vih

2.0

——

VDC

Logic 0 input

Vil

——

0.8

VDC