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STA8089FG Datasheet(PDF) 15 Page - STMicroelectronics |
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STA8089FG Datasheet(HTML) 15 Page - STMicroelectronics |
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15 / 34 page  DocID027175 Rev 8 15/34 STA8089FG General description 33 configured by the ARM946 (see Table 7: TCM Configuration). ITCM can be configured as Ni x 16 KB; DTCM can be configured as 128 + Nd x 16 KB, where Ni + Nd = 8, Ni 1. 3.3.1 AHB slaves G3 APB port that allows to interface with the G3BB acquisition memory and control registers. 512 Kbytes ROM Vectored Interrupt Controller (VIC). SQI flash memory controller 3 x ARM946 APB peripheral bus (APB1, APB2, APB3). Vectored Interrupt Controller (VIC) This Vectored Interrupt Controller (VIC) allows the operative system interrupt handler to quickly dispatch interrupt service routines in response to peripheral interrupts. It provides a software interface to the interrupt system. There are up to 64 interrupt lines. The VIC uses a bit position for each different interrupt source. The software can control each request line to generate software interrupts. Each interrupt line can be independently enabled and configured to trigger a non-vectored Normal Interrupt Request (IRQ) or Fast Interrupt Request (FIQ) to the ARM946 CPU. Sixteen interrupt lines can also be selected to trigger a vectored IRQ. The VIC has two operation modes: the user mode and the privilege mode, in order to have the possibility to set (or not) one level of protection during execution. FS USB device controller Full speed USB device with transceiver. It is an AHB slave. When active requires a 48 MHz clock XTAL_IN. Table 7. TCM Configuration TCMcfg [2] TCMcfg [1] TCMcfg [0] ITCM DTCM 0 0 0 16 KB 240 KB 0 0 1 32 KB 224 KB 0 1 0 48 KB 208 KB 0 1 1 64 KB 192 KB 1 0 0 80 KB 176 KB 1 0 1 96 KB 160 KB 1 1 0 112 KB 144 KB 1 1 1 128 KB 128 KB |
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