STA8089FG datasheet(10/34 Pages) STMICROELECTRONICS

Part #	STA8089FG

Description	Fully integrated GPS/Galileo/GLONASS/BeiDou/QZSS receiver with embedded RF and in-package Flash

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Manufacturer	STMICROELECTRONICS [STMicroelectronics]

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Pin description

STA8089FG

10/34

DocID027175 Rev 8

2.4

Main function pins

2.5

Test/emulated dedicated pins

VINB

1.6 V - 4.3 V

PWR Backup LDO input supply voltage (1.6 V to 4.3 V)

29

VINL1

1.8 V

PWR LDO1 and ADC input supply voltage

31

VINL2

1.6 V - 4.3 V

PWR LDO2 input supply voltage (1.6 V to 4.3 V)

13

VOB

1.0 V

PWR LDO backup output voltage (1.0 V)

21

VOL1

1.1 V

PWR LDO1 output voltage (1.1 V, it can be also configured to 1.2 V)

30

VOL2

1.2 V

PWR LDO2 output voltage (1.2 V)

12

GND

GND Ground

EP

GND_LNA

GND

GND Ground

10

Table 1. Power supply pins (continued)

Symbol

I/O voltage

I/O

Description

STA8089FG

Table 2. Main function pins

Symbol

I/O voltage

I/O

Description

STA8089FG

ADC_IN1

1.4 V – 0 V typ range

I

ADC Analog input [1]

32

ADC_IN2

1.4 V – 0 V typ range

I

ADC Analog input [2]

33

RSTn

1.0 V

I

Reset Input with Schmitt-Trigger characteristics and

noise filter.

25

RTC_XTI

1.0 V (max)

I

Input of the 32 KHz oscillator amplifier circuit and

input of the internal real time clock circuit.

27

RTC_XTO

1.0 V (max)

O

Output of the oscillator amplifier circuit.

28

STDBY_OUT

1.0 V

O

When low, indicates the chip is in Standby mode

23

STDBYn

1.0 V

I

When low, the chip is forced in Standby Mode - All

pins in high impedance except the ones powered by

Backup supply

24

WAKEUP

1.0 V

I

WAKEUP from STANDBY mode

26

Table 3. Test/emulated dedicated pins

Symbol

I/O voltage

I/O

Description

STA8089FG

TCK

VDDIO_R2

I

JTAG Test Clock

56

TDI

VDDIO_R2

I

JTAG Test Data In

53

TDO

VDDIO_R2

O

JTAG Test Data Out

50

TMS

VDDIO_R2

I

JTAG Test Mode Select

2

TRSTn

VDDIO_R2

I

JTAG Test Circuit Reset

3

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