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534AB622M080BGR Datasheet(PDF) 7 Page - Silicon Laboratories |
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534AB622M080BGR Datasheet(HTML) 7 Page - Silicon Laboratories |
7 / 12 page Si550 Preliminary Rev. 0.3 7 2. Pin Descriptions Table 10. Si550 Pin Descriptions Pin Name Type Function 1 VC Analog Input Control Voltage 2 OE* Input Output Enable: 0 = clock output disabled (outputs tri-stated) 1 = clock output enabled 3 GND Ground Electrical and Case Ground 4 CLK+ Output Oscillator Output 5 CLK– (N/A for CMOS) Output Complementary Output (N/C for CMOS) 6 VDD Power Power Supply Voltage *Note: OE includes 17 k Ω pullup resistor to VDD. 1 2 3 6 5 4 VC GND OE VDD CLK+ CLK– (Top View) |
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