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IC41C16100S-45KIG Datasheet(PDF) 7 Page - Integrated Circuit Solution Inc |
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IC41C16100S-45KIG Datasheet(HTML) 7 Page - Integrated Circuit Solution Inc |
7 / 21 page ![]() IC41C16100S IC41LV16100S Integrated Circuit Solution Inc. 7 DR010-0D 11/26/2004 ELECTRICAL CHARACTERISTICS(1) (Recommended Operating Conditions unless otherwise noted.) Symbol Parameter Test Condition Speed Min. Max. Unit IIL Input Leakage Current Any input 0V ≤ VIN ≤ Vcc –5 5 µA Other inputs not under test = 0V IIO Output Leakage Current Output is disabled (Hi-Z) –5 5 µA 0V ≤ VOUT ≤ Vcc VOH Output High Voltage Level IOH = –5.0 mA (5V) 2.4 — V IOH = –2.0 mA (3.3V) VOL Output Low Voltage Level IOL = 4.2 mA (5V) — 0.4 V IOL = 2.0 mA (3.3V) ICC1 Standby Current: TTL RAS, LCAS, UCAS ≥ VIH Commerical 5V — 2 mA 3.3V — 1 Extended 5V — 3 mA 3.3V — 2 ICC2 Standby Current: CMOS RAS, LCAS, UCAS ≥ VCC – 0.2V 5V — 1 mA 3.3V — 0.5 ICC3 Operating Current: RAS, LCAS, UCAS, -45 — 190 mA Random Read/Write(2,3,4) Address Cycling, tRC = tRC (min.) -50 — 160 Average Power Supply Current -60 — 145 ICC4 Operating Current: RAS = VIL, LCAS, UCAS, -45 — 100 mA EDO Page Mode(2,3,4) Cycling tPC = tPC (min.) -50 — 90 Average Power Supply Current -60 — 80 ICC5 Refresh Current: RAS Cycling, LCAS, UCAS ≥ VIH -45 — 180 mA RAS-Only(2,3) tRC = tRC (min.) -50 — 160 Average Power Supply Current -60 — 145 ICC6 Refresh Current: RAS, LCAS, UCAS Cycling -45 — 180 mA CBR(2,3,5) tRC = tRC (min.) -50 — 160 Average Power Supply Current -60 — 145 ICCS Self Refresh Current Self Refresh mode — — 300 µA Notes: 1. An initial pause of 200 µs is required after power-up followed by eight RAS refresh cycles (RAS-Only or CBR) before proper device operation is assured. The eight RAS cycles wake-up should be repeated any time the tREF refresh requirement is exceeded. 2. Dependent on cycle rates. 3. Specified values are obtained with minimum cycle time and the output open. 4. Column-address is changed once each EDO page cycle. 5. Enables on-chip refresh and address counters. |
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