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TLE9185QXV33 Datasheet(PDF) 101 Page - Infineon Technologies AG

Part # TLE9185QXV33
Description  BLDC Driver
Download  192 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

TLE9185QXV33 Datasheet(HTML) 101 Page - Infineon Technologies AG

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TLE9185QXV33
BLDC Driver
Supervision Functions
Datasheet
101
Rev.1.0
2021-01-21
10.8
Thermal Protection
Three independent and different thermal protection features are implemented in the device according to the
system impact:
• Individual thermal shutdown of specific blocks
• Temperature prewarning of VCC1 voltage regulator
• Device thermal shutdown due to VCC1 overtemperature
10.8.1
Individual Thermal Shutdown
As a first-level protection measure, the charge pump is independently switched off if the respective block
reaches the temperature threshold TjTSD1. Then the TSD1 bit is set. This bit can only be cleared via SPI once
the overtemperature is not present anymore. Independent of the device mode the thermal shutdown
protection is only active if the respective block is ON.
The respective modules behave as follows:
• Charge pump: If the charge pump reaches TjTSD1, then CP_OT is set, CPEN is cleared and the activated
MOSFETs are actively discharged with their respective static currents during their respective active cross
current protection times (tHBxCCP active). When all tHBxCCP active elapsed, then the charge pump and
the MOSFETs active discharge are disabled and the current sense amplifier is deactivated. Once the over
temperature condition is not present anymore, then CPEN has to be configured again by SPI.
Note:
The diagnosis bits are not cleared automatically and have to be cleared via SPI once the
overtemperature condition is not present anymore.
10.8.2
Temperature Prewarning
As a next level of thermal protection a temperature prewarning is implemented if the main supply VCC1
reaches the thermal prewarning temperature threshold TjPW. Then the status bit TPW is set. This bit can only
be cleared via SPI once the overtemperature is not present anymore.
10.8.3
Thermal Shutdown
As a highest level of thermal protection a temperature shutdown of the device is implemented if the main
supply VCC1 reaches the thermal shutdown temperature threshold TjTSD2. Once a TSD2 event is detected Fail-
Safe Mode is entered. Only when device temperature falls below the TSD2 threshold then the device remains
in Fail-Safe Mode for tTSD2 to allow the device to cool down. After this time has expired, the device will
automatically change via Restart Mode to Normal Mode (see also Chapter 5.4.6).
When a TSD2 event is detected, then the status bit TSD2 is set. This bit can only be cleared via SPI in Normal
Mode once the overtemperature is not present anymore.
For increased robustness requirements it is possible to extend the TSD2 waiting time by 64x of tTSD2 after 16
consecutive TSD2 events by setting the SPI bit TSD2_DEL. The counter is incremented with each TSD2 event
even if the bit TSD2 is not cleared. Once the counter has reached the value 16, then the bit TSD2_SAFE is set
and the extended TSD2 waiting time is active. The extended waiting time will be kept until TSD2_SAFE is
cleared. The TSD counter is cleared when TSD2 or TSD2_DEL is cleared.
Note:
In case a TSD2 overtemperature occurs while entering Sleep Mode then Fail-Safe Mode is still
entered.
Note:
In case of a TSD2 event, the FAILURE bit is set to ‘1’ and the DEV_STAT field is set to ‘01’ inside the
DEV_STAT register.


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