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TLE9185QXV33 Datasheet(PDF) 99 Page - Infineon Technologies AG

Part # TLE9185QXV33
Description  BLDC Driver
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

TLE9185QXV33 Datasheet(HTML) 99 Page - Infineon Technologies AG

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TLE9185QXV33
BLDC Driver
Supervision Functions
Datasheet
99
Rev.1.0
2021-01-21
10.6
VCC1 Over-/ Undervoltage and Undervoltage Prewarning
10.6.1
VCC1 Undervoltage and Undervoltage Prewarning
This function is always active when the VCC1 voltage regulator is enabled.
A first-level voltage detection threshold is implemented as a prewarning for the microcontroller. The
prewarning event is signaled with the bit VCC1_WARN. No other actions are taken.
As described in Chapter 10.1 and Figure 51, a reset will be triggered (RSTN pulled low) when the VCC1 output
voltage falls below the selected undervoltage threshold (VRTx). The device will enter Restart Mode and the bit
VCC1_UV is set when RSTN is released again.
The hysteresis of the VCC1 undervoltage threshold can be increased by setting the bit RSTN_HYS. In this case
always the highest rising threshold (VRT1,R) is used for the release of the undervoltage reset. The falling reset
threshold remains as configured.
An additional safety mechanism is implemented to avoid repetitive VCC1 undervoltage resets due to high
dynamic loads on VCC1:
• A counter is increased for every consecutive VCC1 undervoltage event (regardless on the selected reset
threshold).
• The counter is active in Init Mode, Normal Mode and Stop Mode.
•For VS < VSINT,UV the counter will be stopped in Normal Mode (i.e. the VS UV comparator is always enabled
in Normal Mode).
• A 4th consecutive VCC1 undervoltage event will lead to Fail-Safe Mode entry and to setting the bit
VCC1_UV_FS.
• This counter is cleared:
– When Fail-Safe Mode is entered.
– When the bit VCC1_UV is cleared.
– When a Soft-Reset is triggered.
Note:
After 4 consecutive VCC1_UV events, the device will enter Fail-Safe Mode and the VCC1_UV_FS bit is
set.
Note:
The VCC1_WARN or VCC1_UV bits are not set in Sleep Mode as VCC1 = 0 V in this case.
Figure 51 VCC1 Undervoltage Timing Diagram
RSTN
t
VCC1
VRTx
tRDx (config)
Normal Mode
t
tRF
Restart Mode
Normal Mode


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