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TLE9185QXV33 Datasheet(PDF) 91 Page - Infineon Technologies AG |
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TLE9185QXV33 Datasheet(HTML) 91 Page - Infineon Technologies AG |
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91 / 192 page  TLE9185QXV33 BLDC Driver Supervision Functions Datasheet 91 Rev.1.0 2021-01-21 Figure 46 Reset Timing Diagram 10.1.2 Soft Reset Description In Normal Mode and Stop Mode, it is also possible to trigger a device internal reset via a SPI command in order to bring the device into a defined state in case of failures. In this case the microcontroller must send a SPI command and set the MODE bits to ‘11’ in the M_S_CTRL register. As soon as this command becomes valid, the device is set back to Init Mode and all SPI registers are set to their default values (see SPI Chapter 11.5.1 and Chapter 11.6.1). Two different soft reset configurations are possible via the SPI bit SOFT_RESET_RO: • SOFT_RESET_RO = ‘0’: The reset output (RSTN) is triggered when the soft reset is executed (default setting) The configured reset delay time tRD1 or tRD2 is applied depending on the value in RSTN_DEL). • SOFT_RESET_RO = ‘1’: The reset output (RSTN) is not triggered when the soft reset is executed. Note: The device must be in Normal Mode or Stop Mode when sending this command. Otherwise, the command will be ignored. Note: Allow CRC configuration after software-reset - or better check once again via SPI after software reset. The reset threshold can be configured via SPI in Normal Mode, default is VRT1 tRD1 tLW Init RSTN SPI t VCC1 VRT1 undervoltage tRDx (config) Normal t t tLW t < tRF tRF tCW Restart Normal SPI Init Reset_timing.vsd tCW tOW WD Trigger tCW tOW WD Trigger SPI Init tLW= long open window tCW= closed window tOW= open window |
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