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TLE9185QXV33 Datasheet(PDF) 9 Page - Infineon Technologies AG |
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TLE9185QXV33 Datasheet(HTML) 9 Page - Infineon Technologies AG |
9 / 192 page Datasheet 9 Rev.1.0 2021-01-21 TLE9185QXV33 BLDC Driver Pin Configuration 8CSAN Inverting input of Current Sense Amplifier. 9CSO Current Sense Amplifier Output. 10 CLK SPI Clock Input. Internal passive pull-down 11 N.U. Not used. 12 N.U. Not used. 13 N.U. Not used. 14 N.U. Not used. 15 N.U. Not used. 16 GND Ground 17 N.U. Not used. 18 CSN SPI Chip Select Not input. Internal passive pull-up 19 SL Source Low Side. 20 GL2 Gate Low Side 2. 21 GL1 Gate Low Side 1. 22 PWM2 PWM input 2. Internal passive pull-up 23 GH2 Gate High Side 2. 24 SH2 Source High Side 2. 25 SH1 Source High Side 1. 26 GH1 Gate High Side 1. 27 PWM1/CRC PWM input 1. Internal passive pull-down CRC. Connect to GND (via pull-down) to activate CRC functionality 28 CPC2N Negative connection to Charge Pump Capacitor 2. 29 CPC2P Positive connection to Charge Pump Capacitor 2. 30 CPC1P Positive connection to Charge Pump Capacitor 1. 31 CPC1N Negative connection to Charge Pump Capacitor 1. 32 VS Supply voltage for Bridge Drivers and Charge pump. Connected to the battery voltage after reverse protection. 33 CP Charge Pump output voltage. 34 PWM3 PWM input 3. Internal passive pull-down 35 GH3 Gate High Side 3. 36 SH3 Source High Side 3. 37 N.U. Not used. 38 N.U. Not used. 39 PWM4 PWM input 4. Internal passive pull-down 40 GL3 Gate Low Side 3. 41 N.U. Not used. 42 WK4/SYNC Wake-up input 4/Sync. 43 N.U. Not used. 44 N.U. Not used. Pin Symbol Function |
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