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TLE9185QXV33 Datasheet(PDF) 87 Page - Infineon Technologies AG |
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TLE9185QXV33 Datasheet(HTML) 87 Page - Infineon Technologies AG |
87 / 192 page Datasheet 87 Rev. 1.0 2021-01-21 TLE9185QXV33 BLDC Driver Gate Drivers Pre-discharge time tPDCHG111 840 1067 1260 ns 1) TPDCHG = 111, BDFREQ= 0 or 1 P_12.11.92 Discharge timeout tOFF_TIMEOUT 3.2 4 4.8 µs 1) PWM_NB=1B P_12.11.9 Low-side gate driver, CP off - Slam mode, parking braking and VS overvoltage braking LS turn-on time, CP off tON_BRAKE –4.5 9 µs CLOAD = 10 nF VGLx-VSL = 5 V, VS > 8 V or VSINT > 8 V P_12.11.42 LS turn-off time, CP off tOFF_BRAKE –0.7 2 µs CLOAD = 10 nF VGLx-VSL = 1.5 V, VS > 8 V or VSINT > 8 V P_12.11.43 High output voltage GLx - SL VGLx_BRAKE 5– 10 V VS > 8 V or VSINT > 8 V P_12.11.48 Charge pump Charge Pump Frequency fCP – 250 – kHz 1) P_12.11.49 Output Voltage VCP vs. VS VCPmin1 8.5 – –V VS = 6 V, ICP = - 6 mA, FET_LVL =1 P_12.11.50 Output Voltage VCP vs. VS VCPmin2 7.5 – –V VS = 6 V, ICP = - 6 mA, FET_LVL =0 P_12.11.51 Regulated CP output voltage, VCP vs. VS VCP1 12 15 17 V 8 V < VS < 23 V ICP = - 12 mA11), CPSTGA = 0, FET_LVL =1 P_12.11.52 Regulated CP output voltage, VCP vs. VS VCP2 12 15 17 V 18 V < VS < 23 V ICP = - 12 mA11), CPSTGA = 1, FET_LVL =1 P_12.11.53 Regulated CP output voltage, VCP vs. VS VCP3 7.5 11 13 V 8 V < VS < 23 V ICP = - 12 mA11), CPSTGA = 0, FET_LVL =0 P_12.11.54 Regulated CP output voltage, VCP vs. VS VCP4 7.5 11 13 V 13 V < VS < 23 V ICP = - 12 mA11), CPSTGA = 0, FET_LVL =0 P_12.11.55 Turn-on time tON_VCP1 5 – 60 µs 1)10)11)18 V<VS< 23 V (25%), ICP = 0 , CPSTGA = 1, FET_LVL =1 P_12.11.56 Table 26 Electrical characteristics: gate drivers (cont’d) VSINT = 5.5 V to 28 V, Tj = -40°C to +150°C, VCP > VS+ 8.5 V, VS= 6 to 19V, all voltages with respect to ground, positive current flowing into pin except for IGLx and IGHx(unless otherwise specified). Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max. |
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