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TLE9185QXV33 Datasheet(PDF) 80 Page - Infineon Technologies AG |
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TLE9185QXV33 Datasheet(HTML) 80 Page - Infineon Technologies AG |
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80 / 192 page  Datasheet 80 Rev. 1.0 2021-01-21 TLE9185QXV33 BLDC Driver Gate Drivers 9.7 Charge pump A dual-stage charge pump supplies the gate drivers for the high-side and low-side MOSFETs. It requires three external capacitors connected between CPC1N and CPC1P, CPC2N and CPC2P, VS and CP. The buffer capacitor between VS and CP must have a capacitance equal or higher than 470 nF. Figure 44 Charge pump - Block diagram Logic or normal level MOSFETs The regulation of the charge pump outputs voltage can be configured depending on the type of MOSFET. FET_LVL = 0: Logic level MOSFETs are selected: •VCP - VS = VCP3 (11 V typ. at VS > 8 V). • The high-side gate-source voltage GHx - SHx is VGH4 (VS > 8 V). • The low-side gate-source voltage GLx - SL is VGH3 (VS > 8 V). FET_LVL = 1: Normal level MOSFETs are selected: •VCP - VS = VCP1(15 V typ. at VS > 8 V). • The high-side and low-side gate-source voltage GHx - SHx or GLx - SL is VGH1 (VS > 8 V). CPSTGA = 0 (default, see GENCTRL), the device operates with the dual-stage charge pump. If CPSTGA = 1, the device switches to single-stage or dual-stage charge pump automatically: •If VS > VCPSODS: the TLE9185QXV33 switches from a dual-stage to a single-stage charge pump. •If VS < VCPSOSD: the TLE9185QXV33 switches from single-stage to dual-stage charge pump. The operation with the single-stage charge pump reduces the current consumption from the VS pin. Single/dual stage charge pump Precharge VS CP CCP ≥ 470 nF CCP1 CCP2 Logic |
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