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LTC6754 Datasheet(PDF) 29 Page - Analog Devices |
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LTC6754 Datasheet(HTML) 29 Page - Analog Devices |
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29 / 34 page  LTC6563 29 Rev. 0 For more information www.analog.com APPLICATIONS INFORMATION e. IO CM/Average Output Current (from Table 1): 7mA f. VCMO (minimum) = IO • [(24.9Ω + 50Ω + 2 • 2Ω)||300Ω] = IO • [78.9Ω||300Ω] = IO • 62.5Ω = 437mV, where IO = 7mA, 24.9Ω is the resistors in series with the TERM pin, 50Ω is the TERM internal resistance, and the 2Ω is the internal RCM minimum value. As can be seen, the only difference between Table 6 and Table 7 is in the last column, Min CM voltage, where this column’s values are lowered in Table 7 by grounding the mid-point of the external load resistors. Summary of TIA Operating Conditions and Their Effects The current output nature of the LTC6563 provides a great deal of flexibility in tailoring the circuit to drive a variety of ADCs, transmission lines, or other loads that are found in various applications. The TIA gain (RT), full scale swing (FS), and output CM voltage design can be optimized using internal termination networks, external termination networks (ground referenced and differen- tial), and ADJ settings. Designing the TIA load and operational settings involves juggling these interdependent parameters. See Table 8 for a summary of how different TIA output operating conditions influence various important aspects of the TIA design: Clamp Function LTC6563 has internal output voltage clamps that restrain its differential output swing. These clamps maintain Table 8. Summary of LTC6563 Output Operating Conditions and Their Performance Effect OPERATING CONDITION EFFECT ON OUTPUT CM EFFECT ON OUTPUT FS SWING EFFECT ON TOTAL POWER DISSIPATION EFFECT ON OVERALL GAIN EFFECT ON SOURCE IMPEDANCE WHEN DRIVING TRANSMISSION LINE RLDIFF Value Increase No Effect Increase No Effect Increase Increase Add/Increase R in Series with TERM Increase Increase No Effect Increase Increase RTEE Value Decrease Reduce No Effect No Effect No Effect No Effect ADJ (Logic Input) Increase Increase Increase Increase Increase No Effect control of the OUT and OUT voltages to prevent overload- ing the ADCs inputs. The clamping speed is on the order of the TIA bandwidth so the ADCs functionality and signal integrity will be minimally affected by output signals that would otherwise exceed the ADCs input range. OUT and OUT will be confined to the range of voltages shown below: Maximum output high side voltage = HI pin voltage Minimum output low side voltage = VCM – (HI – VCM) = 2VCM – HI Please remember that VCM is the pin voltage of the CM input. If the actual output CM voltage differs from the CM pin voltage, unexpected clamping may occur. Consider the example where, with CM = 1.4V and HI = 2.2V. The difference between CM and HI is 0.8V, so the outputs will be clamped between 1.4V ±0.8V. The OUT pin will not exceed 2.2V due to an input signal. At the same time, OUT will be limited to the same swing below the CM voltage or 1.4V – 0.8V = 0.6V. Done this way, a symmetrical swing is guaranteed whilst a single input voltage dictates the voltage limit in both swing directions. It is critical that the voltage applied to the CM device pin represents the actual output CM voltage, otherwise the clamp(s) will not function correctly. With the TERM pins utilized, this requires a valid servo operation where LTC6563 maintains the output CM voltage. When the CM servo loop is not utilized (i.e. TERM and TERM are open), the clamps can still function as long as the CM pin is tied to a voltage that is close to the actual output CM voltage. |
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