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WCMC1616V9X Datasheet(PDF) 9 Page - Weida Semiconductor, Inc. |
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WCMC1616V9X Datasheet(HTML) 9 Page - Weida Semiconductor, Inc. |
9 / 13 page ![]() ADVANCE INFORMATION WCMC1616V9X Document #: 38-14027 Rev. ** Page 9 of 13 Write Cycle No. 3 (WE Controlled, OE LOW) [17, 18] Write Cycle No. 4 (BHE /BLE Controlled, OE LOW) [17, 18] Notes: 16. Data I/O is high impedance if OE = VIH . 17. If Chip Enable goes INACTIVE simultaneously with WE HIGH, the output remains in a high-impedance state. 18. During the DON’T CARE period in the DATA I/O waveform, the I/Os are in output state and input signals should not be applied. VALID DATA tHD tSD tLZWE tPWE tSA tHA tAW tSCE tWC tHZWE CE1 ADDRESS CE2 WE DATAI/O tBW BHE/BLE DON’T CARE DATA I/O ADDRESS tHD tSD tSA tHA tAW tWC CE 1 WE VALID DATA tBW BHE/BLE tSCE CE2 tPWE DON’T CARE |
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