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MDT2005
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P. 7
VER1.1
Instruction Code
Mnemonic
Operands
Function
Operating
Status
011010 trrrrrrr
INCRSZ R, t
Increment register, skip if zero
R + 1→t
None
011011 trrrrrrr
ADDWR R, t
Add W and register
W + R→t
C, HC, Z
011100 trrrrrrr
SUBWR R, t
Subtract W from register
R ﹣W→t
(R+/W+1→t)
C, HC, Z
011101 trrrrrrr
DECR R, t
Decrement register
R ﹣1→t
Z
011110 trrrrrrr
DECRSZ R, t Decrement register, skip if zero R ﹣1→t
None
010010 trrrrrrr
ANDWR R, t
AND W and register
R ∩ W→t
Z
110100 iiiiiiii
ANDWI
i
AND W and immediate
i ∩ W→W
Z
010011 trrrrrrr
IORWR R, t
Inclu. OR W and register
R ∪ W→t
Z
110101 iiiiiiii
IORWI
i
Inclu. OR W and immediate
i ∪ W→W
Z
010100 trrrrrrr
XORWR R, t
Exclu. OR W and register
R ♁ W→t
Z
110110 iiiiiiii
XORWI
i
Exclu. OR W and immediate
i ♁ W→W
Z
011111 trrrrrrr
COMR R, t
Complement register
/R→t
Z
010110 trrrrrrr
RRR
R, t
Rotate right register
R(n) →R(n-1), C
→R(7), R(0)→C
C
010101 trrrrrrr
RLR
R, t
Rotate left register
R(n)→r(n+1),C→
R(0), R(7)→C
C
010000 1xxxxxxx
CLRW
Clear working register
0→W
Z
010001 0rrrrrrr
CLRR
R
Clear register
0→R
Z
0000bb brrrrrrr
BCR
R, b
Bit clear
0→R(b)
None
0010bb brrrrrrr
BSR
R, b
Bit set
1→R(b)
None
0001bb brrrrrrr
BTSC R, b
Bit Test, skip if clear
Skip if R(b)=0
None
0011bb brrrrrrr
BTSS R, b
Bit Test, skip if set
Skip if R(b)=1
None
1000nn nnnnnnnn
LCALL
n
Long CALL subroutine
n→PC,
PC+1→Stack
None
1010nn nnnnnnnn
LJUMP
n
Long JUMP to address
n→PC
None
110000 nnnnnnnn
CALL
n
Call subroutine
n→PC,
PC+1→Stack
None
110001 iiiiiiii
RTIW
i
Return, place immediate to W
Stack→PC, i→W
None
11001n nnnnnnnn
JUMP
n
JUMP to address
n→PC
None
Note :
W
:
Working register
b
:
Bit position
WT
:
Watchdog timer
t
:
Target
TMODE
:
TMODE mode register
0
:
Working register
CPIO
:
Control I/O port register
1
:
General register
TF
:
Timer overflow flag
R
:
General register address
PF
:
Power loss flag
C
:
Carry flag
PC
:
Program Counter
HC :
Half carry
OSC
:
Oscillator
Z
:
Zero flag