CYNSE70032
Document #: 38-02042 Rev. *E
Page 75 of 126
The following is the sequence of operation for a single 272-bit Search command (also see “Commands and Command Param-
eters” on page 19).
• Cycle A: The host ASIC drives CMDV high and applies Search command code (10) on CMD[1:0] signals. CMD[5:3] signals
must be driven with the index to the GMR pair used for bits [271:136] of the data being searched in this operation. DQ[67:0]
must be driven with the 68-bit data ([271:204]) to be compared against all locations 0 in the four-word 68-bit page. The CMD[2]
signal must be driven to logic 1. Note. CMD[2] = 1 signals that the search is a x272 bit search. CMD[8:3] in this cycle is ignored.
• Cycle B: The host ASIC continues to drive CMDV high and applies Search command code (10) on CMD[1:0]. The DQ[67:0]
is driven with the 68-bit data ([203:136]) to be compared against all locations 1 in the four 68-bits-word page.
• Cycle C: The host ASIC drives CMDV high and applies Search command code (10) on CMD[1:0] signals. CMD[5:3] signals
must be driven with the index to the GMR pair used for bits [135:0] of the data being searched. CMD[8:6] signals must be
driven with the bits that will be driven on SADR[21:19] by this device if it has a hit. DQ[67:0] must be driven with the 68-bit data
([135:68]) to be compared against all locations 2 in the four 68-bits-word page. The CMD[2] signal must be driven to logic 0.
• Cycle D: The host ASIC continues to drive CMDV high and applies Search command code (10) on CMD[1:0]. CMD[8:6] signals
must be driven with the index of the SSR that will be used for storing the address of the matching entry and the hit flag (see
page 14 for the description of SSR[0:7]). The DQ[67:0] is driven with the 68-bit data ([67:0]) to be compared to all locations 3
in the four 68-bits-word page. CMD[5:2] is ignored because the Learn instruction is not supported for ×272 tables.
Note
. For 272-bit searches, the host ASIC must supply four distinct 68-bit data words on DQ[67:0] during cycles A, B, C, and D.
The GMR index in cycle A selects a pair of GMRs in each of the eight devices that apply to DQ data in cycles A and B. The GMR
index in cycle C selects a pair of GMRs in each of the eight devices that apply to DQ data in cycles C and D.
cycle
CLK2X
CMDV
CE_L
OE_L
(Miss on
1
cycle
2
cycle
3
cycle
4
cycle
5
cycle
6
cycle
7
cycle
8
cycle
9
cycle
10
CFG = 10101010, HLAT = 000, TLSZ = 01, LRAM = 1, LDEV = 1.
Note: |(LHI[6:0]) stands for the boolean ‘OR’ of the entire bus LHI[6:0].
Note: Each bit in LHO[1:0] is the same logical signal.
PHS_L
SADR[21:0]
SSF
SSV
Search1
Search2 Search3
0
(Global
miss.)
|(LHI[6:0])
LHO[1:0]
this device.)
(Miss on
this device.)
0
z
0
ALE_L
WE_L
1
z
1
0
z
1
0
0
z
0
CMD[1:0]
CMD[8:2]
01
01
Search1
Search2
A B A B A B A B
CMD[2]
A B C D A B C D
DQ
D1
D2
A B C D
D3
A B A B
01
Search3
z
0
0
z
z
1
z
z
00
z
0
Figure 13-51. Timing Diagram for 272-bit Search Device Number 7 (Last Device)
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