CYNSE70032
Document #: 38-02042 Rev. *E
Page 52 of 126
The following is the sequence of operation for a single 136-bit Search command (also see Subsection 12.2, “Commands and
Command Parameters” on page 19).
• Cycle A: The host ASIC drives CMDV high and applies Search command code (10) on CMD[1:0] signals. CMD[5:3] signals
must be driven with the index to the GMR pair for use in this Search operation. CMD[8:6] signals must be driven with the same
bits that will be driven by this device on SADR[21:19] if it has a hit. DQ[67:0] must be driven with the 68-bit data ([135:68]) in
order to be compared against all even locations. The CMD[2] signal must be driven to logic 0.
• Cycle B: The host ASIC continues to drive CMDV high and to apply Search command code (10) on CMD[1:0]. CMD[5:2] must
be driven by the index of the comparand register pair for storing the 136-bit word presented on the DQ bus during cycles A
and B. CMD[8:6] signals must be driven with the SSR index that will be used for storing the address of the matching entry and
the hit flag (see page 14 for the description of SSR[0:7]). The DQ[67:0] is driven with 68-bit data ([67:0]) compared against all
odd locations.
The host ASIC continues to drive CMDV high and to apply Search command code (10) on CMD[1:0]. CMD[5:2] must be driven
by the index of the comparand register pair for storing the 136-bit word presented on the DQ bus during cycles A and B. CMD[8:6]
signals must be driven with the SSR index that will be used for storing the address of the matching entry and the hit flag (see
page 14 for the description of SSR[0:7]). The DQ[67:0] is driven with 68-bit data ([67:0]) compared against all odd locations.
The logical 136-bit Search operation is shown in Figure 13-30. The entire table (eight devices of 136-bit entries) is compared to
a 136-bit word K (presented on the DQ bus in cycles A and B of the command) using the GMR and local mask bits. The GMR is
the 136-bit word specified by the even and odd global mask pair selected by the GMR Index in the command’s cycle A.
cycle
CLK2X
CMDV
CMD[1:0]
CE_L
OE_L
CMD[8:2]
Search2
Search4
1
cycle
2
cycle
3
cycle
4
cycle
5
cycle
6
cycle
7
cycle
8
cycle
9
cycle
10
CFG = 01010101, HLAT = 010, TLSZ = 01, LRAM = 1, LDEV = 1.
Note: |(LHI[6:0]) stands for the boolean ‘OR’ of the entire bus LHI[6:0].
Note: Each bit in LHO[1:0] is the same logical signal.
PHS_L
SADR[21:0]
SSF
SSV
Search1
Search2
Search3
Search4
01
01
01
01
Search1
Search3
A B A B A B A B
A4
0
|(LHI[6:0])
LHO[1:0]
0
z
0
0
z
0
ALE_L
WE_L
1z
1
0
z
1
0
0
z
1
0
A B A B A B A B
DQ
D1
D2
D3
D4
(Miss on
this device.)
(Miss on
this device.)
(Local but not
global winner.)
(Global winner.)
Figure 13-29. Timing Diagram for 136-bit Search Device Number 7 (Last Device)
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