CYNSE70032
Document #: 38-02042 Rev. *E
Page 4 of 126
LIST OF FIGURES
Figure 6-1. CYNSE70032 Clocks (CLK2X and PHS_L) ...................................................................... 13
Figure 7-1. Comparand Register Selection during Search and Learn Instructions ............................. 13
Figure 7-2. Addressing the Global Mask Register Array ..................................................................... 14
Figure 10-1. CYNSE70032 Database Width Configuration ................................................................. 17
Figure 10-2. Multiwidth Database Configurations ................................................................................ 18
Figure 11-1. Addressing CYNSE70032 Data and Mask Arrays .......................................................... 18
Figure 12-1. Single-Location Read Cycle Timing ................................................................................20
Figure 12-2. Burst Read of the Data and Mask Arrays (BLEN = 4) ..................................................... 21
Figure 12-3. Single Write Cycle Timing ............................................................................................... 22
Figure 12-4. Burst Write of the Data and Mask Arrays (BLEN = 4) ..................................................... 23
Figure 13-1. Timing Diagram for 68-bit Search in ×68 Table (One Device) ........................................ 24
Figure 13-2. Hardware Diagram for a Table with a Single Device ....................................................... 25
Figure 13-3. ×68 Table with One Device ............................................................................................. 25
Figure 13-4. Hardware Diagram for a Table with Eight Devices .......................................................... 27
Figure 13-5. Timing Diagram for 68-bit Search Device Number 0 ....................................................... 28
Figure 13-6. Timing Diagram for 68-bit Search Device Number 1 ....................................................... 29
Figure 13-7. Timing Diagram for 68-bit Search Device Number 7 (Last Device) ................................ 30
Figure 13-8. ×68 Table with Eight Devices .......................................................................................... 31
Figure 13-9. Hardware Diagram for a Table with 31 Devices .............................................................. 32
Figure 13-10. Hardware Diagram for a Block of up to Eight Devices .................................................. 33
Figure 13-11. Timing Diagram for Each Device in Block Number 0 (Miss on Each Device) ............... 34
Figure 13-12. Timing Diagram for Each Device Above the Winning Device in Block Number 1 ......... 35
Figure 13-13. Timing Diagram for Globally Winning Device in Block Number 1 ................................. 36
Figure 13-14. Timing Diagram for Devices Below the Winning Device in Block Number 1 ................. 37
Figure 13-15. Timing Diagram for Devices Above the Winning Device in Block Number 2 ................ 38
Figure 13-16. Timing Diagram for Globally Winning Device in Block Number 2 ................................. 39
Figure 13-17. Timing Diagram for Devices Below the Winning Device in Block Number 2 ................. 40
Figure 13-18. Timing Diagram for Devices Above the Winning Device in Block Number 3 ................ 41
Figure 13-19. Timing Diagram for Globally Winning Device in Block Number 3 ................................. 42
Figure 13-20. Timing Diagram for Devices Below the Winning Device in Block Number 3
(Except the Last Device [Device Number 30]) ...................................................................................... 43
Figure 13-21. Timing Diagram for Device Number 6 in Block Number 3
(Device Number 30 in Depth-Cascaded Table) .................................................................................... 44
Figure 13-22. ×68 Table with 31 Devices ............................................................................................ 45
Figure 13-23. Timing Diagram for 136-bit Search (One Device) ......................................................... 46
Figure 13-24. Hardware Diagram for a Table With One Device .......................................................... 46
Figure 13-25. ×136 Table with One Device ......................................................................................... 47
Figure 13-26. Hardware Diagram for a Table with Eight Devices ........................................................ 49
Figure 13-27. Timing Diagram for 136-bit Search Device Number 0 ................................................... 50
Figure 13-28. Timing Diagram for 136-bit Search Device Number 1 ................................................... 51
Figure 13-29. Timing Diagram for 136-bit Search Device Number 7 (Last Device) ............................ 52
Figure 13-30. ×136 Table with Eight Devices ...................................................................................... 53
Figure 13-31. Hardware Diagram for a Table with 31 Devices ............................................................ 55
Figure 13-32. Hardware Diagram for a Block of up to Eight Devices .................................................. 56
Figure 13-33. Timing Diagram for Each Device in Block Number 0 (Miss on Each Device) ............... 57
Figure 13-34. Timing Diagram for Each Device Above the Winning Device in Block Number 1 ......... 58
Figure 13-35. Timing Diagram for Globally Winning Device in Block Number 1 ................................. 59
Figure 13-36. Timing Diagram for Devices Below the Winning Device in Block Number 1 ................. 60
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