CYNSE70032
Document #: 38-02042 Rev. *E
Page 32 of 126
The timing diagrams referred to in this paragraph reference the Hit/Miss assumptions defined in Table 13-6. For the purpose of
illustrating timings, it is further assumed that the there is only one device with a matching entry in each of the blocks. Figure 13-11
shows the timing diagram for a Search command in the 68-bit-configured table of 31 devices for each of the eight devices in block
number 0. Figure 13-12 shows a timing diagram for a Search command in the 68-bit-configured table of 31 devices for all the
devices in block number 1 (above the winning device in that block). Figure 13-13 shows the timing diagram for the globally winning
device (defined as the final winner within its own and all blocks) in block number 1. Figure 13-14 shows the timing diagram for
all the devices below the globally winning device in block number 1. Figure 13-15, Figure 13-16, and Figure 13-17, respectively,
show the timing diagrams of the devices above the globally winning device, the globally winning device, and the devices below
the globally winning device for block number 2. Figure 13-18, Figure 13-19, Figure 13-20, and Figure 13-21, respectively, show
the timing diagrams of the devices above the globally winning device, the globally winning device, and the devices below the
globally winning device except the last device (device 30) for block number 3.
The 68-bit Search operation is pipelined and executed as follows. Four cycles from the Search command, each of the devices
knows the outcome internal to it for that operation. In the fifth cycle after the Search command, the devices in a block arbitrate
for a winner amongst them (a “block” being defined as less than or equal to eight devices resolving the winner between them
using the LHI[6:0] and LHO[1:0] signalling mechanisms). In the sixth cycle after the Search command, the blocks resolve the
winning block through the BHI[2:0] and BHO[2:0] signalling mechanisms. The winning device within the winning block is the global
winning device for a Search operation.
Table 13-6. Hit/Miss Assumption
Search Number
1
2
3
4
Block 0
Miss
Miss
Miss
Miss
Block 1
Miss
Miss
Hit
Miss
Block 2
Miss
Hit
Hit
Miss
Block 3
Hit
Hit
Miss
Miss
BHO[2]
Block of 8 CYNSE70032s Block 0 (devices 0–7)
BHO[1]
BHO[0]
BHI[2]
BHI[1]
BHI[0]
BHI[2]
Block of 7 CYNSE70032s Block 3 (devices 24–30)
BHI[1]
BHI[0]
GND
BHO[2]
BHO[1]
BHO[0]
BHI[2]
BHI[1]
BHI[0]
GND
BHI[2]
BHI[1]
BHI[0]
GND
Block of 8 CYNSE70032s Block 1 (devices 8–15)
Block of 8 CYNSE70032s Block 2 (devices 16–23)
DQ[67:0]
SRAM
BHO[2]
BHO[2]
BHO[1]
BHO[1]
BHO[0]
BHO[0]
CMD[8:0], CMDV
SSF, SSV
Figure 13-9. Hardware Diagram for a Table with 31 Devices
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