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MAX4397 Datasheet(PDF) 16 Page - Maxim Integrated Products |
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MAX4397 Datasheet(HTML) 16 Page - Maxim Integrated Products |
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16 / 30 page  Volume Control The TV channel volume control ranges from -56dB to +6dB in 2dB steps. The VCR volume control settings are programmable for -6dB, 0dB, and +6dB. These gain levels are referenced to the application inputs, where some dividers are present. With the ZCD bit set, the TV volume control switches only at zero-crossings, thus minimizing click noise. The TV outputs can bypass the volume control. Likewise, the monaural output sig- nal can be processed by the TV volume control or it can bypass the volume control. Digital Section Serial Interface The MAX4397 uses a simple 2-wire serial interface requiring only two standard microprocessor port I/O lines. The fast-mode I2C-compatible serial interface allows communication at data rates up to 400kbps or 400kHz. Figure 6 shows the timing diagram of the sig- nals on the 2-wire interface. The two bus lines (SDA and SCL) must be at logic-high when the bus is not in use. The MAX4397 is a slave device and must be controlled by a master device. Pullup resistors from the bus lines to the supply are required when push-pull circuitry is not driving the lines. The logic level on the SDA line can only change when the SCL line is low. The start and stop conditions occur when SDA toggles low/high while the SCL line is high (see Figure 6). Data on SDA must be stable for the duration of the setup time (tSU,DAT) before SCL goes high. Data on SDA is sampled when SCL toggles high with data on SDA stable for the duration of the hold time (tHD,DAT). Note that data is transmitted in an 8-bit byte. A total of nine clock cycles are required to transfer a byte to the MAX4397. The device acknowledges the successful receipt of the byte by pulling the SDA line low during the 9th clock cycle. Audio/Video Switch for Dual SCART Connectors 16 ______________________________________________________________________________________ SCL SDA tLOW tF tR tHD, STA tHD, DAT tHD, STA tSU, DAT tSU, STA tBUF tSU, STA STOP CONDITION REPEATED START CONDITION START CONDITION Figure 6. SDA and SCL Signal Timing Diagram |
Similar Part No. - MAX4397_V01 |
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Similar Description - MAX4397_V01 |
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