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CLRC66103HNT Datasheet(PDF) 41 Page - NXP Semiconductors |
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CLRC66103HNT Datasheet(HTML) 41 Page - NXP Semiconductors |
41 / 152 page NXP Semiconductors CLRC661 High performance NFC frontend CLRC661 plus of the EEPROM, which are called Sections. Five sections 0..4 with different purpose do exist. Section Page Byte addresses Access rights Memory content 00 to 31 r product information and configuration 0 0 32 to 63 r/w product configuration 1 1 to 2 64 to 191 r/w register reset 2 3 to 95 192 to 6143 r/w free 3 96 to 111 6144 to 7167 w MIFARE Classic key 4 112 to 127 7168 to 8191 r Register Set Protocol (RSP) Table 28. EEPROM memory organization The following figure shows the structure of the EEPROM: 001aan359 Production and config Section 0: Register reset Section 1: Free Section 2: MIFARE Classic key area (MKA) Section 3: RSP-Area for TX Section 4_TX: RSP-Area for RX Section 4_RX: Figure 27. Sector arrangement of the EEPROM 8.7.2.1 Product information and configuration - Page 0 The first EEPROM page includes production data as well as configuration information. Address (Hex.) 0 1 2 3 4 5 6 7 00 ProductID Version Unique IDentifier 08 Unique IDentifier Manufacturer Data 10 ManufacturerData 18 ManufacturerData Table 29. Production area (Page 0) ProductID: Identifier for a CLRC663 product or derivative, only address 01h shall be evaluated for identifying the Product, address 00h and 02h shall be ignored by software. CLRC661 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 3.7 — 23 June 2021 COMPANY PUBLIC 456937 41 / 152 |
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