MST703-LF datasheet(65/207 Pages) ETC1

Part #	MST703-LF

Description	Small Size LCD TV Processor with Video Decoder

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Mstar Confidential

for 深圳市江启科技有限公司

Internal Use Only

MST703

Small Size LCD TV Processor with Video Decoder

Preliminary Data Sheet Version 0.1

- 65 -

11/24/2010

Scaler Register (Bank=00, Registers B0h ~ FFh)

Index

Mnemonic

Bits

Description

OP2R

3

Display Port Reset.

0: Normal operation.

1: Reset.

-

2

Reserved.

OSDR

1

Internal OSD Reset.

0: Normal operation.

1: Reset internal OSD.

SWR

0

Software Reset (reset All digital core except system registers).

0: Normal operation.

1: Reset.

SWRST1

7:0

Default : 0x00

Access : R/W

VFER

7

Video Decoder Front End Reset.

0: Normal operation.

1: Reset.

VCFR

6

Video Decoder Comb Filter Reset.

0: Normal operation.

1: Reset.

MCUR

5

Embedded MCU Reset.

0: Normal operation.

1: Reset.

MCUR

4

GMC digital tune Reset.

0: Normal operation.

1: Reset.

E3h

-

3:0

Reserved.

ISOVRD

7:0

Default : 0x00

Access : R/W

SL

7

Shift Line.

0: Shift line method 0.

1: Shift line method 1 for interlace mode.

CSHS

6

HSYNC in coast.

0: HSYOUT (recommended).

1: Re-shaped HSYNC.

UVSP

5

User defined input VSYNC Polarity, active when IVSJ =1.

0: Active low.

1: Active high.

E4h

IVSJ

4

Input VSYNC polarity judgment.

0: Use result of internal circuit detection.

1: Defined by user (UVSP).

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