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MST703-LF Datasheet(PDF) 63 Page - List of Unclassifed Manufacturers |
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MST703-LF Datasheet(HTML) 63 Page - List of Unclassifed Manufacturers |
63 / 207 page Mstar Confidential for 深圳市江启科技有限公司 Internal Use Only MST703 Small Size LCD TV Processor with Video Decoder Preliminary Data Sheet Version 0.1 - 63 - 11/24/2010 Copyright © 2010 MStar Semiconductor, Inc. All rights reserved. Scaler Register (Bank=00, Registers B0h ~ FFh) Index Mnemonic Bits Description ATPTTH[7:0] 7:0 Auto Phase Text Threshold for ATPV4. ATPCTRL 7:0 Default : 0x00 Access : R/W ATP_FLTRMD 7 0: Disable auto-position filter mode. 1: Enable auto-position filter mode. GRY (RO) 6 Gray scale detect (read only). TXT (RO) 5 Text detect (read only). APMASK[2:0] 4:2 Nose Mask. 000: Mask 0 bit, default value. 001: Mask 1 bit. 010: Mask 2 bit. 011: Mask 3 bit. 100: Mask 4 bit. 101: Mask 5 bit. 110: Mask 6 bit. 111: Mask 7 bit. ATPR (RO) 1 Auto Phase Result ready. 0: Result not ready. 1: Result ready. DBh ATPE 0 Auto Phase function Enable. 0: Disable. 1: Enable. ATPV1 (RO) 7:0 Default : - Access : RO DCh ATPVALUE[7:0] 7:0 Auto Phase Value. ATPV2 (RO) 7:0 Default : - Access : RO DDh ATPVALUE[15:8] 7:0 See description for ATPVALUE[7:0]. ATPV3 (RO) 7:0 Default : - Access : RO DEh ATPVALUE[23:16] 7:0 See description for ATPVALUE[7:0]. ATPV4 (RO) 7:0 Default : - Access : RO DFh ATPVALUE[31:24] 7:0 See description for ATPVALUE[7:0]. PDMD0 7:0 Default : 0x00 Access : R/W E0h GCLK[1:0] 7:6 Gated Clock for SRAM. 00: Normal. 01: V Blank. 10: H Blank and V Blank. 11: Reserved. Free Datasheet http://www.datasheet4u.net/ |
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