MST703-LF datasheet(33/207 Pages) ETC1

Part #	MST703-LF

Description	Small Size LCD TV Processor with Video Decoder

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Mstar Confidential

for 深圳市江启科技有限公司

Internal Use Only

MST703

Small Size LCD TV Processor with Video Decoder

Preliminary Data Sheet Version 0.1

- 33 -

11/24/2010

OSD Register (Bank = 00, Registers A0h ~ AAh)

OSD Register (Bank=00)

Index

Mnemonic

Bits

Description

OSDIOA

7:0

Default : 0x00

Access : R/W

TOSB_MD

7

OSD SRAM I/O Access Burst Mode.

0: Disable.

1: Enable.

CLR

6

OSD Clear Bit (write only).

0: Normal.

1: Clear code with 00h, attribute with 00h.

-

5

Reserved.

RF

4

OSD RAM Font I/O Access.

0: Disable.

1: Enable.

DC

3

OSD Display Code I/O Access.

0: Disable.

1: Enable.

DA

2

OSD Display Attribute I/O Access.

0: Disable.

1: Enable.

ORBW_MD

1

OSD Register Burst Write Mode.

0: Disable.

1: Enable.

A0h

ORBR_MD

0

OSD Register Burst Read Mode.

0: Disable.

1: Enable.

OSDRA

7:0

Default : 0x00

Access : R/W

-

7:6

Reserved.

A1h

OSDRA

5:0

OSD Register Address Port.

OSDRD

7:0

Default : 0x00

Access : R/W

A2h

OSDRD

7:0

OSD Register Data Port.

OSDFA

7:0

Default : -

Access : WO

A3h

OSDFA

7:0

OSD RAM Font Address Port.

OSDFD

7:0

Default : -

Access : WO

A4h

OSDFD

7:0

OSD RAM Font Data Port.

DISPCA_L

7:0

Default : -

Access : WO

A5h

DISPCA[7:0]

7:0

OSD Display Code Address Port.

A6h

DISPCA_H

7:0

Default : -

Access : WO

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