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MST703-LF Datasheet(PDF) 30 Page - List of Unclassifed Manufacturers |
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MST703-LF Datasheet(HTML) 30 Page - List of Unclassifed Manufacturers |
30 / 207 page Mstar Confidential for 深圳市江启科技有限公司 Internal Use Only MST703 Small Size LCD TV Processor with Video Decoder Preliminary Data Sheet Version 0.1 - 30 - 11/24/2010 Copyright © 2010 MStar Semiconductor, Inc. All rights reserved. Scaler Register (Bank=00, Registers 01h ~ 9Fh) Index Name Bits Description - 7:3 Reserved. CAP_VCNT[10:8] 2:0 Cap V total high byte [10:8]. CAP_HCNT_L 7:0 Default : - Access : RO 7Ch CAP_HCNT[7:0] 7:0 Cap H total low byte [7:0]. CAP_HCNT_H 7:0 Default : - Access : RO - 7:3 Reserved. 7Dh CAP_HCNT[10:8] 2:0 Cap H total high byte [10:8]. EST_VCNT_L 7:0 Default : - Access : RO 7Eh EST_VCNT[7:0] 7:0 Est V total low byte [7:0]. EST_VCNT_H 7:0 Default : - Access : RO - 7:3 Reserved. 7Fh EST_VCNT[10:8] 2:0 Est V total high byte [10:8]. EST_HCNT_L 7:0 Default : 0x00 Access : R/W 80h EST_HCNT[7:0] 7:0 Est H total low byte [7:0]. EST_HCNT_H 7:0 Default : 0x00 Access : R/W - 7:3 Reserved. 81h EST_HCNT[10:8] 2:0 Est H total low byte [10:8]. SSC_TLRN 7:0 Default : 0x00 Access : R/W 82h SSC_TLRN[7:0] 7:0 SSC Tolerance. Delta_L 7:0 Default : 0x00 Access : R/W 83h DELTA[7:0] 2:0 Delta[7:0]. Delta_H 7:0 Default : 0x00 Access : R/W - 7:5 Reserved. 84h DELTA[12:8] 4:0 Delta[12:8]. SSC_SHIFT 7:0 Default : 0x00 Access : R/W 85h SSC_SHIFT[7:0] 7:0 SSC Shift. FNTN_TST 7:0 Default : 0x00 Access : R/W - 7:6 Reserved. MSK_SHRT_LN_CLK 5 Mask the Clock when in Short Line. - 4 Reserved. SYNC_GATE_MD 3 Mask HYSNC and Clock Mode. RB_SWAP 2 Output channel RB Swap. 86h LM_SWAP_6 1 Output Channel MSB LSB Swap in 6-bit bus mode. Free Datasheet http://www.datasheet4u.net/ |
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