MST703-LF datasheet(14/207 Pages) ETC1

Part #	MST703-LF

Description	Small Size LCD TV Processor with Video Decoder

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Mstar Confidential

for 深圳市江启科技有限公司

Internal Use Only

MST703

Small Size LCD TV Processor with Video Decoder

Preliminary Data Sheet Version 0.1

- 14 -

11/24/2010

Scaler Register (Bank=00, Registers 01h ~ 9Fh)

Index

Name

Bits

Description

ISSM

2

Input Sync Sample Mode.

0: Normal.

1: Glitch-removal.

MVD_SEL

1:0

MVD mode Select

0: CVBS.

1: S-Video.

2: YCbCr.

3: RGB.

SPRVST_L

7:0

Default : 0x10

Access : R/W, DB

05h

SPRVST[7:0]

7:0

Image vertical sample start point, count by input HSYNC (lower 8

bits).

SPRVST_H

7:0

Default : 0x00

Access : R/W, DB

-

7:3

Reserved.

06h

SPRVST[10:8]

2:0

Image vertical sample start point, count by input HSYNC (higher 3

bits).

SPRHST_L

7:0

Default : 0x01

Access : R/W, DB

07h

SPRHST[7:0]

7:0

Image horizontal sample start point, count by input dot clock

(higher 8 bits).

SPRHST_H

7:0

Default : 0x00

Access : R/W, DB

-

7:3

Reserved.

08h

SPRGST[10:8]

2:0

Image horizontal sample start point, count by input dot clock

(lower 3 bits).

SPRVDC_L

7:0

Default : 0x10

Access : R/W, DB

09h

SPRVDC[7:0]

7:0

Image vertical resolution (vertical display enable area count by

line; lower 8 bits).

SPRVDC_H

7:0

Default: 0x00

Access : R/W

-

7:3

Reserved.

0Ah

SPRVDC[10:8]

2:0

Image vertical resolution (vertical display enable area count by

line; higher 3 bits).

SPRHDC_L

7:0

Default : 0x10

Access : R/W

0Bh

SPRHDC[7:0]

7:0

Image horizontal resolution (horizontal display enable area count

by pixel; lower 8 bits).

SPRHDC_L

7:0

Default : 0x00

Access : R/W

-

7:3

Reserved.

0Ch

SPRHDC[10:8]

2:0

Image horizontal resolution (horizontal display enable area count

by pixel; higher 3 bits).

Free Datasheet http://www.datasheet4u.net/

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