MST703-LF datasheet(90/207 Pages) ETC1

Part #	MST703-LF

Description	Small Size LCD TV Processor with Video Decoder

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Mstar Confidential

for 深圳市江启科技有限公司

Internal Use Only

MST703

Small Size LCD TV Processor with Video Decoder

Preliminary Data Sheet Version 0.1

- 90 -

11/24/2010

Analog Register (Bank = 01)

Index

Name

Bits

Description

EXT_DIS_RNG

7:4

Extraction start point in line extraction mode.

-

3

Reserved.

HSTT_DLY_EN

2

H Start Delay Enable.

HSST_DLY[9:8]

1:0

H Start Delay numbers High byte.

CLK_DLY_SYNCOUT

7:0

Default : 0x00

Access : R/W

FRPSETH

7

Set High to Invert RGB Data when FRP Disable (BK1_D2[1]=1).

-

6

Reserved.

TC_GPIO_SEL

5

0: TC function.

1: GPIO function.

OEV_MD_SEL

4

0: Normal mode.

1: Special mode.

EDh

CLK_DLY_SEL_TC

[3:0]

3:0

TCCLK Delay Select.

GPO_CKV_END2

7:0

Default : 0x28

Access : R/W

CKV2_EN

7

CKV2 Enable.

CKV_END2_MULT[1:0]

6:5

00: x1.

01: x4.

10: x8.

11: x16.

EEh

GPO_CKV_END2

4:0

CKV2 End point.

Q1H_SETTING

7:0

Default : 0x08

Access : R/W

Q1H_ENABLE

7

Q1H output from SEQ_MODE pin, toggle point is using OEV3 signal

start point.

TCCLK_INV_MODE

6:3

0001: TCCLK invert every field.

0011: TCCLK invert when Q1H is high.

0101: TCCLK invert when Q1H and field are high.

1001: TCCLK invert when Q1H is low and field is high.

-

2

Reserved.

INTOUT_OEN

1

Testmode. PAD_INTOUT output enable control.

0: Output.

1: Input.

EFh

CLKIN_SEL

0

Testmode External Clock Select.

0: PAD_INTOUT.

1: PAD_CLKIN.

WDT0

7:0

Default : 0x00

Access : R/W

F0h

WDT_TESTMD

7

CSOG test mode for WDT counter.

Free Datasheet http://www.datasheet4u.net/

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