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EP1C12F100I7 Datasheet(PDF) 19 Page - Altera Corporation |
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EP1C12F100I7 Datasheet(HTML) 19 Page - Altera Corporation |
19 / 94 page Altera Corporation 19 Preliminary Information Cyclone FPGA Family Data Sheet Cyclone devices include an enhanced interconnect structure within LABs for routing LE output to LE input connections faster using LUT chain connections and register chain connections. The LUT chain connection allows the combinatorial output of an LE to directly drive the fast input of the LE right below it, bypassing the local interconnect. These resources can be used as a high-speed connection for wide fan-in functions from LE 1 to LE 10 in the same LAB. The register chain connection allows the register output of one LE to connect directly to the register input of the next LE in the LAB for fast shift registers. The Quartus II Compiler automatically takes advantage of these resources to improve utilization and performance. Figure 10 shows the LUT chain and register chain interconnects. |
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