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EP1C12F100I7 Datasheet(PDF) 37 Page - Altera Corporation

Part # EP1C12F100I7
Description  Cyclone FPGA Family
Download  94 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

EP1C12F100I7 Datasheet(HTML) 37 Page - Altera Corporation

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Altera Corporation
37
Preliminary Information
Cyclone FPGA Family Data Sheet
Figure 24. I/O Clock Regions
PLLs
Cyclone PLLs provide general-purpose clocking with clock multiplication
and phase shifting as well as outputs for differential I/O support. Cyclone
devices contain two PLLs, except for the EP1C3 device, which contains
one PLL.
Column I/O Clock Region
IO_CLK[5..0]
Column I/O Clock Region
IO_CLK[5..0]
6
6
I/O Clock Regions
I/O Clock Regions
8
Global Clock
Network
Row
I/O Regions
Cyclone Logic Array
6
6
LAB Row Clocks
labclk[5..0]
LAB Row Clocks
labclk[5..0]
LAB Row Clocks
labclk[5..0]
LAB Row Clocks
labclk[5..0]
LAB Row Clocks
labclk[5..0]
LAB Row Clocks
labclk[5..0]
6
6
6
6


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