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EP1C12F100I7 Datasheet(PDF) 16 Page - Altera Corporation |
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EP1C12F100I7 Datasheet(HTML) 16 Page - Altera Corporation |
16 / 94 page 16 Altera Corporation Cyclone FPGA Family Data Sheet Preliminary Information Figure 8. Carry Select Chain The Quartus II Compiler automatically creates carry chain logic during design processing, or the designer can create it manually during design entry. Parameterized functions such as LPM functions automatically take advantage of carry chains for the appropriate functions. The Quartus II Compiler creates carry chains longer than 10 LEs by linking LABs together automatically. For enhanced fitting, a long carry chain runs vertically allowing fast horizontal connections to M4K memory blocks. A carry chain can continue as far as a full column. LE4 LE3 LE2 LE1 A1 B1 A2 B2 A3 B3 A4 B4 Sum1 Sum2 Sum3 Sum4 LE10 LE9 LE8 LE7 A7 B7 A8 B8 A9 B9 A10 B10 Sum7 LE6 A6 B6 Sum6 LE5 A5 B5 Sum5 Sum8 Sum9 Sum10 01 01 LAB Carry-In LAB Carry-Out LUT LUT LUT LUT data1 LAB Carry-In data2 Carry-In0 Carry-In1 Carry-Out0 Carry-Out1 Sum |
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