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EP1C12F100I7 Datasheet(PDF) 92 Page - Altera Corporation

Part # EP1C12F100I7
Description  Cyclone FPGA Family
PDF  94 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

EP1C12F100I7 Datasheet(HTML) 92 Page - Altera Corporation

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Altera Corporation
Cyclone FPGA Family Data Sheet
Preliminary Information
Note to Tables 67
− 68:
(1)
EP1C3 devices do not support the PCI I/O standard. These parameters are only
available on row I/O pins.
Tables 69 and 70 show the maximum output clock rate for column and
row pins in Cyclone devices.
Table 68. Cyclone Maximum Input Clock Rate for Row Pins
I/O Standard
-6 Speed
Grade
-7 Speed
Grade
-8 Speed
Grade
Unit
LVTTL
304
304
304
MHz
2.5 V
220
220
220
MHz
1.8 V
213
213
213
MHz
1.5 V
166
166
166
MHz
LVCMOS
304
304
304
MHz
SSTL-3 class I
100
100
100
MHz
SSTL-3 class II
100
100
100
MHz
SSTL-2 class I
134
134
134
MHz
SSTL-2 class II
134
134
134
MHz
3.3-V PCI (1)
66
66
66
MHz
LVDS
231
231
231
MHz
Table 69. Cyclone Maximum Output Clock Rate for Column Pins
I/O Standard
-6 Speed
Grade
-7 Speed
Grade
-8 Speed
Grade
Unit
LVTTL
304
304
304
MHz
2.5 V
220
220
220
MHz
1.8 V
213
213
213
MHz
1.5 V
166
166
166
MHz
LVCMOS
304
304
304
MHz
SSTL-3 class I
100
100
100
MHz
SSTL-3 class II
100
100
100
MHz
SSTL-2 class I
134
134
134
MHz
SSTL-2 class II
134
134
134
MHz
LVDS
231
231
231
MHz


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