EP1C12F100I7 datasheet(50/94 Pages) ALTERA

Part #	EP1C12F100I7

Description	Cyclone FPGA Family

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Manufacturer	ALTERA [Altera Corporation]

Direct Link	http://www.altera.com

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Altera Corporation

Cyclone FPGA Family Data Sheet

Preliminary Information

Figure 32. Cyclone IOE in Bidirectional I/O Configuration

The Cyclone device IOE includes programmable delays to ensure zero

hold times, minimize setup times, or increase clock to output times.

Chip-Wide Reset

OE Register

VCCIO

Optional

PCI Clamp

Column or Row

Interconect

ioe_clk[5..0]

Input Register

Input Pin to

Input Register Delay

or Input Pin to

Logic Array Delay

Input Pin to

Logic Array Delay

Drive Strength Control

Open-Drain Output

Slew Control

sclr/preset

OE

clkout

ce_out

aclr/prn

clkin

ce_in

Output

Pin Delay

Programmable

Pull-Up

Resistor

Bus Hold

PRN

CLRN

DQ

Output Register

PRN

CLRN

DQ

PRN

CLRN

DQ

VCCIO

comb_datain

data_in

ENA

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