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FAN7930C Datasheet(PDF) 15 Page - ON Semiconductor |
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FAN7930C Datasheet(HTML) 15 Page - ON Semiconductor |
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15 / 22 page  www.onsemi.com 15 w hich is nor mally higher than in nor mal operation. This operation is improved w hen soft-start time is very long. How ever, too much startup time enlarges the output voltage building time at light load. FA N7930C has overshoot protection at startup. During startup, the feedback loop is controlled by an internal proportional gain controller and, w hen the output voltage reaches the rated value, it sw itches to an external compensator after a transition time of 30 ms. This internal proportional gain controller eliminates overshoot at startup and an external conventional compensator takes over successfully afterw ard. Depends on Load VOUT VCOMP Startup Overshoot Internal Controller t Conventional Controller Startup Overshoot Control Control Transition Figure 37. Startup w ithout Overshoot 9. T HD Optim ization: Total Har monic Distortion (THD) is the factor that dictates how closely input current shape matches sinusoidal form. The turn-on time of the PFC controller is almost constant over one A C line period due to the extremely low feedback control response. The turn-off time is deter mined by the current decrease slope of the boost inductor made by the input voltage and output voltage. Once inductor current becomes zero, resonance betw een COSS and the boost inductor makes oscillating w aveforms at the drain pin and auxiliary w inding. By checking the aux iliary w inding voltage through the Z CD pin, the controller can check the zero current of boost inductor. At the same time , a minor delay is inserted to deter mine the valley position of drain voltage. The input and output voltage difference is at its maximum at the zero cross point of AC input voltage. The current decrease slope is steep near the zero cross region and more negative inductor current flow s during a drain voltage valley detection time. Such a negative inductor current cancels dow n the positive current flow s and input current becomes zero, called “zero-cross distortion” in PFC. 1.5V 150ns 1.4V ON VZCD t IINDUCTOR MOSFET gate INEGATIVE ON IIN IMOSFET IDIODE Figure 38. Input and Output Current Near Input Voltage Peak 1.5V 150ns 1.4V ON ON VZCD t IINDUCTOR MOSFET gate INEGATIVE ON ON IIN Figure 39. Input and Output Current Near Input Voltage Peak Zero Cross To improve this, lengthened turn-on time near the zero cross region is a w ell-know n technique, though the method may vary and may be proprietary. FA N7930C optimizes this by sourcing current through the Z CD pin. Auxiliary w inding voltage becomes negative w hen the MOSFET turns on and is proportional to input voltage. The negative clamping circuit of ZCD outputs the current to maintain the Z CD voltage at a fixed value. The sourcing current from the Z CD is directly proportional to the input voltage. Some portion of this current is applied to the internal saw tooth generator, together w ith a fixed-current source. Theoretically, the fixed-current source and the capacitor at saw tooth generator deter mine the maximum turn-on time w hen no current is sourcing at Z CD c lamp circuit and available turn-on time gets shorter proportional to the Z CD sourcing current. |
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Similar Description - FAN7930C |
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