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FAN7930B Datasheet(PDF) 13 Page - ON Semiconductor |
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FAN7930B Datasheet(HTML) 13 Page - ON Semiconductor |
13 / 22 page ![]() www.onsemi.com 13 Figure 28. Auxiliary Voltage Threshold When no Z CD signal is available, the PFC controller cannot turn on the MOSFET, so the controller chec ks every sw itching off time and forces MOSFET turn on w hen the off time is longer than 150 μs. This restart timer triggers MOSFET turn-on at startup and may be used at the input voltage zero cross period. Figure 29. Restart Tim er at Startup Because the MOSFET turn-on depends on the Z CD input, sw itching frequency may increase to higher than several megahertz due to the mis-triggering or noise on the nearby ZCD pin. If the sw itching frequency is higher than needed for critical conduction mode ( CRM), operation mode shifts to continuous conduction mode (CCM). In CCM, unlike CRM w here the boost inductor current is reset to zero at the next sw itch on; inductor current builds up at every sw itching cycle and can be raised to very high current that exceeds the current rating of the pow er sw itch or diode. This can seriously damage the pow er sw itch. To avoid this, maximum sw itching frequency limitation is embedded. If ZCD signal is applied again w ithin 3.3 μs after the previous rising edge of gate signal, this signal is ignored internally and FA N7930B w aits for another ZCD signal. This slightly degrades the pow er factor performance at light load and high input voltage. ZCD after COMPARATOR MOSFET Gate Max fSW Limit Inhibit Region Error Occurs! Ignores ZCD Noise t Figure 30. Maxim um Sw itching Frequency Lim it Operation 6. Control: The scaled output is compared w ith the internal reference voltage and sinking or sourcing current is generated from the COMP pin by the transconductance amplifier. The error amplifier output is compared w ith the internal saw tooth w aveform to give proper turn-on time based on the controller. VOUT PFC + - INV 1 COMP 3 Clamp Circuit + - VREF Stair Step THD optimized Sawtooth Generator Sawtooth MOSFET Off R1 C1 C2 1V 6.2V Figure 31. Control Circuit Unlike a conventional voltage- mode PWM controller, FA N7930B turns on the MOSFET at the falling edge of ZCD signal. The “ ON” instant is deter mined by the external signal and the turn-on time lasts until the error amplifier output (VCOMP) and saw tooth w aveform meet. When load is heavy, output voltage decreases, scaled output decreases, COMP voltage increases to compensate low output, turn-on time lengthens to give more inductor turn-on time, and increased inductor current raises the output voltage. This is how a PFC negative feedback controller regulates output. The maximum of VCOMP is limited to 6. 5 V, w hich dictates the max imum turn-on time. Sw itching stops w hen VCOMP is low er than 1.0 V. ZCD after COMPARATOR VCOMP & Sawtooth MOSFET Gate t s / V 155 . 0 Figure 32. Turn-On Tim e Determ ination V IN V OUT PFC- V IN 1.5 V 150 ns Delay 1 .4V ON ON V OUT PFC- V IN IMOSFET IDIODE V ZCD t I INDUCTOR V DS MOSFET gate V OUT V IN V CC t RESTART MOSFET Gate ZCD after COMPARATOR t s 150 |
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