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FAN7930B Datasheet(PDF) 11 Page - ON Semiconductor |
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FAN7930B Datasheet(HTML) 11 Page - ON Semiconductor |
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11 / 22 page  www.onsemi.com 11 Applications Information 1. Startup: Nor mally, supply voltage (V CC) of a PFC block is fed from the additional pow er supply, w hich can be called standby pow er. Without this standby pow er, auxiliary w inding for zero current detection can be used as a supply source. Once the supply voltage of the PFC block exceeds 12 V, internal operation is enabled until the voltage drops to 8. 5 V. If VCC exceeds VZ, 20 mA current is sinking from VCC. VCC VZ + - VTH(S/S) 12 8.5 VCC’ 2.5VREF internal bias VBIAS VREF reset H:open 20mA PFC Inductor Aux. Winding VIN PFC VOUT PFC External VCC circuit when no standby power exists. 8 Figure 22. Startup Circuit 2. INV Block : Scaled-dow n voltage from the output is the input for the INV pin. Many functions are embedded based on the INV pin: transconductance amplifier, output OVP comparator, and disable comparator. For the output voltage contr ol, a transconductance amplifier is used instead of the conventional voltage amplifier. The transconductance amplifier (voltage- controlled c urrent source) aids the implementation of the OV P and disable functions. The output current of the amplifier changes according to the voltage difference of the inverting and non- inver ting input of the amplifier. To cancel dow n the line input voltage effect on pow er factor correction, the effective contr ol response of the PFC bloc k should be slow er than the line frequency and this conflicts w ith the transient response of the c ontr oller. Tw o-pole one-zero type compensation can meet both requirements. The OV P comparator shuts dow n the output drive bloc k w hen the voltage of the INV pin is higher than 2.675 V and ther e is 0.175 V hysteresis. The disable compar ator disables operation w hen the voltage of the inverting input is low er than 0.35 V and there is 100 mV hysteresis. An exter nal s mall-signal MOSFET can be used to disable the IC, as show n in Figure 23. The IC operating current decreas es to reduce pow er consumption if the IC is disabled. Figur e 24 is the timing chart of the internal circuit near the INV pin w hen rated PFC output voltage is 390 VDC and VCC supply voltage is 15 V. Figure 23. Circuit Around INV Pin Figure 24. Tim ing Chart for INV Block 3. OVP Pin: Over-Voltage Protection ( OV P) is embedded by the infor mation at the INV pin. That information comes from the output through the voltage dividing resistors. To scale dow n from a high voltage to a low one, high resistance is nor mally used w ith low resistance. If the resistor of high res istance gets damaged and resistance is changed to high, though INV pin infor mation is nor mal, output voltage exceeds its rated output. If this occurs, the output electrolytic capacitor may be damaged. To prevent such a catastrophe additional OV P pin is assigned to double- check output voltage. Additional OV P may be called “second” OV P, w hile INV pin OV P is called “first” OVP. Since the tw o OVP conditions are quite different, the protection recovering mode is different. + - + - + - VOUT PFC + - 2.5V 0. 45V/0. 35V INV Open 2. 675V/2.5V OVP 2.885V 1 INV 3 COMP 0.45 0 35 d i sabl e 2 .6 75 2.5 d i sabl e OVP 2 2 nd OVP 2 8 85 h i gh 390V DC 2 .50V 2 .65V 0. 45V Current Sourcing Current Sourc ing I s ink ing 0. 35V 1. 64V 2.24 V 2. 50V 2. 0V 413V 390V 70V 55V V OUT PFC V INV VCC IOUT COMP Disable OVP t V CC<2 V, internal logic is not aliv e . - Internal s ignals are unk nown . 15V |
Similar Part No. - FAN7930B |
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Similar Description - FAN7930B |
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