FAN4868

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7

FUNCTIONAL DESCRIPTION

Circuit Description

The FAN4868 is a synchronous boost regulator, typically

operating at 3 MHz in Continuous Conduction Mode

(CCM), which occurs at moderate to heavy load current and

At light−load currents, the converter switches

automatically to power−saving PFM Mode. The regulator

automatically

and

smoothly

transitions

between

quasi−fixed−frequency continuous conduction PWM Mode

and variable−frequency PFM Mode to maintain the highest

possible efficiency over the full range of load current and

input voltage.

PWM Mode Regulation

The FAN4868 uses a minimum on−time and computed

excellent transient response by employing current mode

modulation. This technique causes the regulator output to

exhibit a load line. During PWM Mode, the output voltage

this appears as a constant output resistance.

The “droop” caused by the output resistance when a load

is applied allows the regulator to respond smoothly to load

transients with negligible overshoot.

100

200

300

400

500

600

700

2.0

2.5

3.0

3.5

4.0

4.5

Input Voltage (V)

5.0

3.3

5.0

When the regulator is in PWM CCM Mode and the target

computed as:

(eq. 1)

drops to:

0.2 + 4.974 V

(eq. 1A)

0.2 + 4.914 V

(eq. 1B)

PFM Mode

the regulator enters PFM Mode. Boost pulses are inhibited

enable the output to pump up sufficiently with each PFM

boost pulse. Therefore, the regulator behaves like a constant

on−time regulator, with the bottom of its output voltage

ripple at 5.05 V in PFM Mode.

Table 7. OPERATING STATES

Mode

Description

Invoked When:

LIN

Linear Startup

SS

Boost Soft−Start

BST

Boost Operating

Mode

Shutdown and Startup

If EN is LOW, all bias circuits are off and the regulator is

in Shutdown Mode. During shutdown, true load disconnect

LIN State

is limited to about 630 mA during LIN1 Mode.

is initiated. Otherwise, LIN1 times out after 16 clock counts

and the LIN2 Mode is entered.

In LIN2 Mode, the current source is incremented to

counts, a fault condition is declared.

SS State

current limited to about 50% of nominal level, incrementing

to full scale over a period of 32 clock counts.

If the output fails to achieve 90% of its set point within 96

clock counts at full−scale current limit, a fault condition is

declared.

BST State

This is the normal operating mode of the regulator. The

which keeps the regulator’s switching frequency reasonably

during the prior cycle.