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AT572D740

7001AS–DPS–03/04

Development Tools

D740 is supported with a complete set of software and hardware development tools.

MADE

The D740 is supported by a set of development tools integrated into a visual develop-

ment environment called MADE (Multicore Application Development Environment).

MADE provides the user with an integrated environment for producing applications for

both the D740 cores, the ARM7TDMI and the mAgic DSP, by means of a common

project management and support for the MARMOS Minimal Bios.

Code generation tools for the ARM include the GNU Code Development Chain for

ARM7 (C-C++ compiler, assembler, linker and utilities) and the ARM SDT Code Devel-

opment Chain (C-C++ compiler, assembler, linker and utilities).

Code generation tools for mAgic include C compiler (GNU gcc based, ANSI compliant),

VLIW assembler-optimizer, code compressor, linker and utilities.

MADE supports the MARMOS Minimal Bios, a set of helper functions for the ARM-

mAgic intercommunication and the D740 peripherals management. MARMOS gives the

user the basic APIs for building an integrated ARM-mAgic application.

MADE provides the user with a simulation engine and an emulation kernel: the Cycle-

Accurate simulator and the D740 emulator board support.

JTAG-ICE

The ARM Standard In-Circuit-Emulation debug interface is supported via the JTAG-ICE

port of the D740.

When the ARM ICE configuration is selected, the usual debug capabilities for the ARM

System are supported, while the support for the mAgic core is limited to memory and

status registers inspection.

The 5 jtag pins are shared between ARM7TDMI ICE functionality and the DIOPSIS 740

chip Boundary Scan Logic. The “JCFG” pin acts as ARM jtag / D740 BSL selector.

When “JCFG” pin is high the ARM ICE is selected, while DIOPSIS 740 BSL is selected

when “JCFG” is low.

JTST

JTST is a low cost general-purpose module that provides the appropriate resources in order to

test DIOPSIS 740.

JTST provides the following resources to DIOPSIS 740:

–

mAgic SSRAM, ARM FLASH and SRAM

–

4 Stereo Audio 20 bit CODECs

–

1 USB 2.0 Full (12 Mbps)

–

2 RS232/LVTTL a/synchronous serial I/O lines

–

2 SPI serial I/O lines

–

Reset Logic (Power ON, Push Button, WDG)

–

IO connectors (USART, SPI, USB, PIO, AUDIO)

–

PLL-Clock Logic (25 MHz oscillator + CLK connector)

–

DIP SWITCH & Status 7-segment Display

–

Voltage Regulators 5V/3.3V & 5V/1.8V

–M-ICE JTAG