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AT572D740 Datasheet(PDF) 7 Page - ATMEL Corporation |
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AT572D740 Datasheet(HTML) 7 Page - ATMEL Corporation |
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7 / 22 page  7 AT572D740 7001AS–DPS–03/04 mAgic FPU_EXC ARM IRQ15 from mAgic “exception” out-02 high To be used for monitoring mAgic FPU_MODE ARM IRQ25 from mAgic “mode” out-02 To be used for monitoring 0 = mAgic in system mode 1 = mAgic in run mode JTAG ICE_NTRST JTAG Test reset in low (internal Pull-Up) JTAG ICE_TCK JTAG Test clock in JTAG ICE_TDI JTAG Test data input in (internal Pull-Up) JTAG ICE_TDO JTAG Test data output out-02 JTAG ICE_TMS JTAG Test mode in low (internal Pull-Up) D740 JCFG ARM JTAG / D740 Boundary Scan selection in 0 à D740 Boundary Scan 1 à ARM JTAG PIO PIO[27:0] Parallel Input/Output bi-02 general purpose programmable I/Os or ARM peripheral I/Os PLL PLL_CLKIN Reference clock in 25MHz (max) if PLL_EN =1 100MHz (max) if PLL_EN =0 PLL PLL_CLKOUT PLL Clock output out-02 100MHz (max) if PLL_EN =1 fixed low if PLL_EN = 0 PLL PLL_EN Pll enable (PLL_CLKIN x4 multiply) in high 1 à system clock = PLL_CLKIN x 4 0 à system clock = PLL_CLKIN PLL PLL_LFT PLL lowpass filter input in PLL PLL_LOCK PLL lock condition out-02 high To be used for monitoring D740 RESET System reset in low asynchronous mAgic SINGLE Single user on mAgic external memory in high (internal Pull-Up) 0 à Not default user of shared XM 1 à Single user of not shared XM or default user of shared XM SPI SPI0_MOSI SPI 0 Master Out/Slave In data bi-02 SPI SLV à data input SPI MST à data output SPI SPI0_MISO SPI 0 Master In/Slave Out data bi-02 SPI SLV à data output SPI MST à data input SPI SPI0_NSS SPI 0 Input/Output Chip select bi-02 SPI SLV à CS Input SPI MST à CS 0 Output SPI SPI0_NSS[3:1] SPI 0 Output Chip Selects out-02 SPI SLV à n.a. SPI MST à CS 3, 2, 1 Outputs SPI SPI0_SCK SPI 0 Serial clock bi-03 SPI SLV à clock input SPI MST à clock output SPI SPI1_MOSI SPI 1 Master Out/Slave In data bi-02 SPI SLV à data input SPI MST à data output Table 6. D740 Pin Description (Continued) Module Name Function Type Active Level Notes |
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