W25Q16JVSSIQ datasheet(22/75 Pages) WINBOND

Part #	W25Q16JVSSIQ

Description	3V 16M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI

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Manufacturer	WINBOND [Winbond]

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W25Q16JV

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Instruction Set Table 2 (Dual/Quad SPI Instructions)(1)

Data Input Output

Byte 1

Byte 2

Byte 3

Byte 4

Byte 5

Byte 6

Byte 7

Byte 8

Byte 9

Number of Clock(1-1-2)

8

4

Fast Read Dual Output

3Bh

A23-A16

A15-A8

A7-A0

Dummy

(D7-D0)(7)

Number of Clock(1-2-2)

8

4

Fast Read Dual I/O

BBh

A23-A16(6)

A15-A8(6)

A7-A0(6)

Dummy(11)

(D7-D0)(7)

Mftr./Device ID Dual I/O

92h

A23-A16(6)

A15-A8(6)

00(6)

Dummy(11)

(MF7-MF0)

(ID7-ID0)(7)

Number of Clock(1-1-4)

8

2

Quad Input Page Program

32h

A23-A16

A15-A8

A7-A0

(D7-D0)(9)

(D7-D0)(3)

…

Fast Read Quad Output

6Bh

A23-A16

A15-A8

A7-A0

Dummy

(D7-D0)(10)

Number of Clock(1-4-4)

8

2(8)

2

Mftr./Device ID Quad I/O

94h

A23-A16

A15-A8

00

Dummy(11)

Dummy

(MF7-MF0)

(ID7-ID0)

Fast Read Quad I/O

EBh

A23-A16

A15-A8

A7-A0

Dummy(11)

Dummy

(D7-D0)

Set Burst with Wrap

77h

Dummy

W8-W0

Notes:

1.

Data bytes are shifted with Most Significant Bit first. Byte fields with data in parenthesis “( )” indicate data

output from the device on either 1, 2 or 4 IO pins.

2.

The Status Register contents and Device ID will repeat continuously until /CS terminates the instruction.

3.

At least one byte of data input is required for Page Program, Quad Page Program and Program Security

Registers, up to 256 bytes of data input. If more than 256 bytes of data are sent to the device, the

addressing will wrap to the beginning of the page and overwrite previously sent data.

4.

Write Status Register-1 (01h) can also be used to program Status Register-1&2, see section 8.2.5.

5.

Security Register Address:

Security Register 1: A23-16 = 00h; A15-8 = 10h; A7-0 = byte address

Security Register 2: A23-16 = 00h; A15-8 = 20h; A7-0 = byte address

Security Register 3: A23-16 = 00h; A15-8 = 30h; A7-0 = byte address

6.

Dual SPI address input format:

IO0 = A22, A20, A18, A16, A14, A12, A10, A8

A6, A4, A2, A0, M6, M4, M2, M0

IO1 = A23, A21, A19, A17, A15, A13, A11, A9

A7, A5, A3, A1, M7, M5, M3, M1

7.

Dual SPI data output format:

IO0 = (D6, D4, D2, D0)

IO1 = (D7, D5, D3, D1)

8.

Quad SPI address input format:

Set Burst with Wrap input format:

IO0 = A20, A16, A12, A8,

A4, A0, M4, M0

IO0 = x, x, x, x, x, x, W4, x

IO1 = A21, A17, A13, A9,

A5, A1, M5, M1

IO1 = x, x, x, x, x, x, W5, x

IO2 = A22, A18, A14, A10, A6, A2, M6, M2

IO2 = x, x, x, x, x, x, W6, x

IO3 = A23, A19, A15, A11, A7, A3, M7, M3

IO3 = x, x, x, x, x, x, x,

x

9.

Quad SPI data input/output format:

IO0 = (D4, D0, …..)

IO1 = (D5, D1, …..)

IO2 = (D6, D2, …..)

IO3 = (D7, D3, …..)

10. Fast Read Quad I/O data output format:

IO0 = (x, x, x, x, D4, D0, D4, D0)

IO1 = (x, x, x, x, D5, D1, D5, D1)

IO2 = (x, x, x, x, D6, D2, D6, D2)

IO3 = (x, x, x, x, D7, D3, D7, D3)

11. The first dummy is M7-M0 should be set to Fxh

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