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LP8866S-Q1 Datasheet(PDF) 15 Page - Texas Instruments |
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LP8866S-Q1 Datasheet(HTML) 15 Page - Texas Instruments |
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15 / 82 page  – Optionally, the BST_SYNC can be tied to VDD to enable the boost spread spectrum function or tied to GND to disable it. • ISET pin to set the maximum LED current level per string. 7.3.2 Function Setting Device parameter setting includes: • BST_FSET pin is used to set the boost switching frequency through a resistor to signal ground. • PWM_FSET pin is used to set the LED output PWM dimming frequency through a resistor to signal ground. • MODE pin is used to set the dimming mode via an external resistor to signal ground. • LED_SET pin is used to set the LED configuration through a resistor to signal ground. • ISET pin is used to set the maximum LED current level per OUTx pin. 7.3.3 Device Supply (VDD) All internal analog and digital blocks of LP8866S-Q1 are biased from external supply from VDD pin. Either a typical 5-V or 3.3-V supply rail is able to supply VDD from previous linear regulator or DC/DC converter with at least 150-mA current capability. 7.3.4 Enable (EN) The LP8866S-Q1 only turns on when the input voltage of EN pin is above the voltage threshold (VENIH) and turns off when the voltage of EN pin is below the threshold (VENIL). All analog and digital blocks start operating once the LP8866S-Q1 is enabled by asserting EN pin. The SD pin is floating, I2C interface and Fault detection are not active if the EN pin is de-asserted. 7.3.5 Charge Pump An integrated regulated charge pump can be used to supply the gate drive for the external FET of the boost controller. The charge pump is enabled or disabled by automatically detecting whether VDD and CPUMP pin are connected together. If VDD is < 4.5 V then use the charge pump to generate a 5-V gate voltage to drive the external boost switching FET. To use the charge pump, a 2.2-µF capacitor is placed between C1N and C1P. If the charge pump is not required, C1N and C1P could be left unconnected and CPUMP pins tied to VDD. A 4.7- µF CPUMP capacitor is used to store energy for the gate driver. The CPUMP capacitor is required to be used in both charge pump enabled and disabled conditions and must be placed as close as possible to the CPUMP pins. Figure 7-1and Figure 7-2 show required connections for both use cases. L FB VDD ISNSGND COUT ISNS GD CIN C1N C1P CPUMP SD PGND VOUT 3.3V VSENSE_P VIN VSENSE_N 3 to 48V VDD CVDD CPUMP CFLY Figure 7-1. Charge Pump Enabled Circuit www.ti.com LP8866S-Q1 SNVSBD1A – AUGUST 2020 – REVISED FEBRUARY 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 15 Product Folder Links: LP8866S-Q1 |
Similar Part No. - LP8866S-Q1_V01 |
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Similar Description - LP8866S-Q1_V01 |
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