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LP8866S-Q1 Datasheet(PDF) 53 Page - Texas Instruments |
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LP8866S-Q1 Datasheet(HTML) 53 Page - Texas Instruments |
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53 / 82 page  7.6.1.11 FSM_DIAGNOSTICS Register (Offset = 14h) [reset = 0h] FSM_DIAGNOSTICS is shown in Figure 7-33 and described in Table 7-24. Return to Summary Table. Figure 7-33. FSM_DIAGNOSTICS Register 15 14 13 12 11 10 9 8 RESERVED R-0h 7 6 5 4 3 2 1 0 RESERVED FSM_LIVE_STATUS R-0h R-0h Table 7-24. FSM_DIAGNOSTICS Register Field Descriptions Bit Field Type Reset Description 15-5 RESERVED R 0h These bits are reserved 4-0 FSM_LIVE_STATUS R 0h Current state of the functional state machine 0h = DISABLED 1h = LDO_STARTUP 2h = OTP_READ 3h = STANDBY 4h-Fh = BOOST_STARTUP 10h = NORMAL 11h = SHUTDOWN 12h = FAULT_RECOVERY 13h = ALL_LED_FAULT 7.6.1.12 PWM_INPUT_DIAGNOSTICS Register (Offset = 16h) [reset = 0h] PWM_INPUT_DIAGNOSTICS is shown in Figure 7-34 and described in Table 7-25. Return to Summary Table. Figure 7-34. PWM_INPUT_DIAGNOSTICS Register 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 PWM_INPUT_STATUS R-0h Table 7-25. PWM_INPUT_DIAGNOSTICS Register Field Descriptions Bit Field Type Reset Description 15-0 PWM_INPUT_STATUS R 0h 16-bit value for detected duty cycle of PWM input signal. 7.6.1.13 PWM_OUTPUT_DIAGNOSTICS Register (Offset = 18h) [reset = 0h] PWM_OUTPUT_DIAGNOSTICS is shown in Figure 7-35 and described in Table 7-26. Return to Summary Table. Figure 7-35. PWM_OUTPUT_DIAGNOSTICS Register 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 PWM_OUTPUT_STATUS R-0h www.ti.com LP8866S-Q1 SNVSBD1A – AUGUST 2020 – REVISED FEBRUARY 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 53 Product Folder Links: LP8866S-Q1 |
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