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LP8866S-Q1 Datasheet(PDF) 43 Page - Texas Instruments |
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LP8866S-Q1 Datasheet(HTML) 43 Page - Texas Instruments |
43 / 82 page 7.6 Register Maps 7.6.1 FullMap Registers Table 7-12 lists the memory-mapped registers for the FullMap registers. All register offset addresses not listed in Table 7-12 should be considered as reserved locations and the register contents should not be modified. Table 7-12. FULLMAP Registers Offset Acronym Register Name Section 00h BRT_CONTROL Display Brightness Go 02h LED_CURR_CONFIG LED Current Go 04h USER_CONFIG1 User Config 1 Go 06h USER_CONFIG2 User Config 2 Go 08h SUPPLY_INT_EN Supply Interrupt Enable Go 0Ah BOOST_INT_EN Boost Interrupt Enable Go 0Ch LED_INT_EN LED Interrupt Enable Go 0Eh SUPPLY_STATUS Supply Fault Status Go 10h BOOST_STATUS Boost Fault Status Go 12h LED_STATUS LED Fault Status Go 14h FSM_DIAGNOSTICS Device State Diagnostics Go 16h PWM_INPUT_DIAGNOSTICS PWM Input Diagnostics Go 18h PWM_OUTPUT_DIAGNOSTICS PWM Output Diagnostics Go 1Ah LED_CURR_DIAGNOSTICS LED Current Diagnostics Go 1Ch ADAPT_BOOST_DIAGNOSTICS Adaptive Boost Diagnostics Go 1Eh AUTO_DETECT_DIAGNOSTICS Auto Detect Diagnostics Go Complex bit access types are encoded to fit into small table cells. Table 7-13 shows the codes that are used for access types in this section. Table 7-13. FullMap Access Type Codes Access Type Code Description Read Type R R Read Write Type W W Write Reset or Default Value –n Value after reset or the default value 7.6.1.1 BRT_CONTROL Register (Offset = 00h) [reset = 0h] BRT_CONTROL is shown in Figure 7-23 and described in Table 7-14. Return to Summary Table. Figure 7-23. BRT_CONTROL Register 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 DISPLAY_BRT R/W-0h www.ti.com LP8866S-Q1 SNVSBD1A – AUGUST 2020 – REVISED FEBRUARY 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 43 Product Folder Links: LP8866S-Q1 |
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