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LP8866S-Q1 Datasheet(PDF) 42 Page - Texas Instruments |
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LP8866S-Q1 Datasheet(HTML) 42 Page - Texas Instruments |
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42 / 82 page  7.5.2 Programming Examples 7.5.2.1 General Configuration Registers The LP8866S-Q1 does not require any serial interface configuration. It can be simply controlled with the EN pin and PWM pin. Most of the device configuration is accomplished using external resistor values. If I2C interface is available then extended configuration is possible. The configuration registers can be written from standby state to normal state as shown in Table 7-10. Table 7-10. Configuration Registers REGISTER NAME FUNCTION ADV_SLOPE_ENABLE Enables advance sloper S-shape smoothing function. DITHER_SELECT Selects up to 3 bits of PWM dither for added dimming resolution. SLOPE_SELECT Selects duration for linear brightness sloper. BRT_MODE Selects PWM pin or DISPLAY_BRT register for brightness control. SPREAD_RANGE Selects up to 2 bits boost switching frequency spread spectrum range. SPREAD_MOD_FREQ Selects up to 2 bits boost switching frequency spread spectrum modulation frequency. SPREAD_PSEUDO_EN Enables pseudo random modulation for boost switching spread spectrum frequency. 7.5.2.2 Clearing Fault Interrupts The LP8866S-Q1 has an INT pin to alert the host when a fault occurs. If I2C interface is available, the Interrupt Fault Status registers can be read back to learn which fault(s) have been detected. These status bits are located in the SUPPLY_STATUS, BOOST_STATUS and LED_STATUS registers. Each interrupt status has a STATUS bit and a CLEAR bit. To clear a fault interrupt status a 1 must be written to both the STATUS bit and CLEAR bit at the same time. 7.5.2.3 Disabling Fault Interrupts By default, most of the LP8866S-Q1 faults trigger the INT pin. Each fault has two INT_EN bits. These bits are located in the SUPPLY_INT_EN, BOOST_INT_EN, and LED_INT_EN registers. If the INT_EN bit is read and returns 2b'10, the INT pin is triggered when that fault occurs. The fault interrupt can be disabled by writing 2b'01 to its INT_EN bits, or it can be enabled by writing 2b'11 to its INT_EN bits. There is also a GLOBAL fault interrupt that can be disabled to prevent any faults from triggering the INT pin. 7.5.2.4 Diagnostic Registers The LP8866S-Q1 contains several diagnostic registers than can be read with the serial interface for debugging or additional device information. Table 7-11 is a summary of the available registers. Table 7-11. Diagnostic Registers REGISTER NAME FUNCTION FSM_LIVE_STATUS Current state of the functional state machine PWM_INPUT_STATUS Measured 16-bit duty cycle of the PWM pin input LED_PWM_STATUS 16-bit LED PWM duty cycle from state machine LED_CURRENT_STATUS 12-bit LED current DAC value from state machine VBOOST_STATUS 10-bit value for adaptive boost voltage target — value is linear between VBOOST_MIN and VBOOST_MAX calculations MODE_SEL_CFG Dimming mode configuration from MODE detection LED_STRING_CFG LED string phase configuration from LEDSET detection BOOST_FREQ_SEL Boost switching frequency value from BST_FSET detection PWM_FREQ_SEL LED PWM frequency value from PWM_FSET detection LP8866S-Q1 SNVSBD1A – AUGUST 2020 – REVISED FEBRUARY 2021 www.ti.com 42 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: LP8866S-Q1 |
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