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LP8866S-Q1 Datasheet(PDF) 40 Page - Texas Instruments |
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LP8866S-Q1 Datasheet(HTML) 40 Page - Texas Instruments |
40 / 82 page ![]() 7.4.8 Fault Recovery Some critical faults can trigger fault recover state. LED drivers, boost converter, and power-line FET are disabled for 100 ms, and the device attempts to restart from standby mode if EN is still high and brightness is greater than zero. 7.4.9 Latch Fault If all LED strings are disabled due to faults then the LP8866S-Q1 enters the latch fault mode. This state can be exited only by pulling the EN pin low. 7.4.10 Start-Up Sequence V IN VIN EN VDD PWM INPUT BOOST VOUT LEDx SHUTDOWN DEVICE INIT STANDBY PL FET SOFTSTART BOOST SOFTSTART NORMAL V INIT SHUTDOWN Figure 7-20. Start-Up Sequence Diagram 7.5 Programming 7.5.1 I2C-Compatible Interface The LP8866S-Q1 device supports I2C interface to access and change the configuration. The 7-bit base slave address is 0x2A or 0x2B. The address could be configured through the resistor settings of MODE pin. Write I2C transactions are made up of 4 bytes. The first byte includes the 7-bit slave address and Write bit. The 7-bit slave address selects the LP8866S-Q1 slave device. The second byte is eight bits register address. The last two bytes are the 16-bit register value. Read I2C transactions are made up of 5 bytes. The first byte includes the 7-bit slave address and Write bit. The 7-bit slave address selects the LP8866S-Q1 slave device. The second byte is eight bits register address. The third byte includes the 7-bit slave address and Read bit. The last two bytes are the 16-bit register value returned from the slave. where LP8866S-Q1 SNVSBD1A – AUGUST 2020 – REVISED FEBRUARY 2021 www.ti.com 40 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: LP8866S-Q1 |
Similar Part No. - LP8866S-Q1_V01 |
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Similar Description - LP8866S-Q1_V01 |
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