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STM32L412RBI6PXXX Datasheet(PDF) 160 Page - STMicroelectronics

Part # STM32L412RBI6PXXX
Description  Ultra-low-power Arm® Cortex®-M4 32-bit MCUFPU, 100DMIPS, up to 128KB Flash, 40KB SRAM, analog, ext. SMPS
PDF  192 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L412RBI6PXXX Datasheet(HTML) 160 Page - STMicroelectronics

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Electrical characteristics
STM32L412xx
160/192
DS12469 Rev 8
Figure 33. SPI timing diagram - slave mode and CPHA = 0
tv(SO)
Data output valid time
Slave mode 2.7 < VDD < 3.6 V
Voltage Range 1
-
12.5
13.5
ns
Slave mode 1.71 < VDD < 3.6 V
Voltage Range 1
-12.5
24
Slave mode 1.71 < VDD < 3.6 V
Voltage Range 2
-12.5
33
tv(MO)
Master mode
-
4.5
6
th(SO)
Data output hold time
Slave mode
7
-
-
ns
th(MO)
Master mode
0
-
-
1. Guaranteed by characterization results.
2. Maximum frequency in Slave transmitter mode is determined by the sum of tv(SO) and tsu(MI) which has to fit into SCK low or
high phase preceding the SCK sampling edge. This value can be achieved when the SPI communicates with a master
having tsu(MI) = 0 while Duty(SCK) = 50 %.
Table 90. SPI characteristics(1) (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
MSv41658V1
NSS input
CPHA=0
CPOL=0
CPHA=0
CPOL=1
MISO output
MOSI input
tsu(SI)
th(SI)
tw(SCKL)
tw(SCKH)
tc(SCK)
tr(SCK)
th(NSS)
tdis(SO)
tsu(NSS)
ta(SO)
tv(SO)
Next bits IN
Last bit OUT
First bit IN
First bit OUT
Next bits OUT
th(SO)
tf(SCK)
Last bit IN



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