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UPD784938 Datasheet(PDF) 101 Page - NEC |
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UPD784938 Datasheet(HTML) 101 Page - NEC |
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101 / 733 page  101 CHAPTER 3 CPU ARCHITECTURE Preliminary User’s Manual U13987EJ1V0UM00 Table 3-6. List of Special Function Registers (SFRs) (4/5) AddressNote 1 Special Function Register (SFR) Name Symbol R/W Manipulable Bit Units After Reset 1 Bit 8 Bits 16 Bits 0FFBDH Slave status register SSR R √√ — 41H 0FFBEH Success count register SCR — √ — 01H 0FFBFH Communication count register CCR — √ — 20H 0FFC0H Standby control register STBC R/W — √ Note 2 — 30H 0FFC2H Watchdog timer mode register WDM — √ Note 2 — 00H 0FFC4H Memory expansion mode register MM √√ — 20H 0FFC5H Hold mode register HLDM √√ — 00H 0FFC6H Clock output mode register CLOM √√ — 0FFC7H Programmable wait control register 1 PWC1 — √ — AAH 0FFC8H Programmable wait control register 2 PWC2 — — √ AAAAH 0FFCCH Refresh mode register RFM √√ — 00H 0FFCDH Refresh area specification register RFA √√ — 0FFCFH Oscillation stabilization time specification register OSTS — √ — 0FFD0H to External SFR area — √√ —— 0FFDFH 0FFE0H Interrupt control register (INTP0) PIC0 √√ — 43H 0FFE1H Interrupt control register (INTP1) PIC1 √√ — 0FFE2H Interrupt control register (INTP2) PIC2 √√ — 0FFE3H Interrupt control register (INTP3) PIC3 √√ — 0FFE4H Interrupt control register (INTC00) CIC00 √√ — 0FFE5H Interrupt control register (INTC01) CIC01 √√ — 0FFE6H Interrupt control register (INTC10) CIC10 √√ — 0FFE7H Interrupt control register (INTC11) CIC11 √√ — 0FFE8H Interrupt control register (INTC20) CIC20 √√ — 0FFE9H Interrupt control register (INTC21) CIC21 √√ — 0FFEAH Interrupt control register (INTC30) CIC30 √√ — 0FFEBH Interrupt control register (INTP4) PIC4 √√ — 0FFECH Interrupt control register (INTP5) PIC5 √√ — 0FFEDH Interrupt control register (INTAD) ADIC √√ — 0FFEEH Interrupt control register (INTSER) SERIC √√ — 0FFEFH Interrupt control register (INTSR) SRIC √√ — Interrupt control register (INTCSI1) CSIIC1 √√ — 0FFF0H Interrupt control register (INTST) STIC √√ — 0FFF1H Interrupt control register (INTCSI) CSIIC √√ — 0FFF2H Interrupt control register (INTSER2) SERIC2 √√ — Notes 1. When the LOCATION 0 instruction is executed. When the LOCATION 0FH instruction is executed, “F0000H” should be added to the value shown. 2. The write operation is possible by using the dedicated instruction “MOV STBC, #byte” or “MOV WDM, #byte” only. Instructions other than these cannot perform the write operation. |
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