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UPD784938 Datasheet(PDF) 82 Page - NEC |
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UPD784938 Datasheet(HTML) 82 Page - NEC |
82 / 733 page ![]() 82 CHAPTER 3 CPU ARCHITECTURE Preliminary User’s Manual U13987EJ1V0UM00 3.6 µPD78F4938 Memory Mapping The memory size switching register (IMS) specifies the internal memory size. With the µPD78F4938, users are able to select the internal memory capacity using the IMS so that the same memory map as that of mask ROM versions with a different internal memory capacity can be achieved. The IMS is set with an 8-bit memory manipulation instruction. RESET input sets IMS to FFH. Figure 3-6. Internal Memory Size Switching Register (IMS) Caution The IMS is not contained in mask ROM products ( µPD784935, 784936, 784937, 784938). The IMS setting to obtain the same memory map as mask ROM products are shown in Table 3-3. Table 3-3. Internal Memory Size Switching Register (IMS) Setting Value Mask ROM Product IMS Setting Value µPD784935 DDH µPD784936 EEH µPD784937 FFH µPD784938 CCH 7 1 Address: 0FFFCCH After reset: FFH W/R 6 1 5 ROM1 4 ROM0 3 1 2 1 1 RAM1 0 RAM0 IMS Internal ROM Capacity Selection ROM1 ROM0 Internal RAM Capacity Selection RAM1 RAM0 0 0 1 1 0 1 0 1 10,240 bytes 5,120 bytes 6,656 bytes 8,192 bytes 0 0 1 1 0 1 0 1 256 Kbytes 96 Kbytes 128 Kbytes 192 Kbytes |
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