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UPD784938 Datasheet(PDF) 80 Page - NEC |
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UPD784938 Datasheet(HTML) 80 Page - NEC |
80 / 733 page ![]() 80 CHAPTER 3 CPU ARCHITECTURE Preliminary User’s Manual U13987EJ1V0UM00 (1) Internal high-speed RAM (IRAM) The internal high-speed RAM (IRAM) allows high-speed accesses to be made. The short direct addressing mode for high- speed accesses can be used on FD20H to FEFFH in this area. There are two kinds of short direct addressing mode, short direct addressing 1 and short direct addressing 2, according to the target address. The function is the same in both of these addressing modes. With some instructions, the word length is shorter with short direct addressing 2 than with short direct addressing 1. See the 78K/IV Series User’s Manual Instructions for details. A program fetch cannot be performed from IRAM. If a program fetch is performed from an address onto which IRAM is mapped, CPU inadvertent loop will result. The following areas are reserved in IRAM. • General-purpose register area: FE80H to FEFFH • Macro service control word area: FE06H to FE39H (excluding 0FE22H, 0FE23H, 0FE2AH, 0FE2BH, 0FE30H, 0FE31H) • Macro service channel area: FE00H to FEFFH (the address is specified by the macro service control word) If the reserved function is not used in these areas, they can be used as ordinary data memory. Remark The addresses in this text are those that apply when the LOCATION 0 instruction is executed. When the LOCATION 0FH instruction is executed, 0F0000H should be added to the values shown in the text. (2) Peripheral RAM (PRAM) The peripheral RAM (PRAM) is used as ordinary program memory or data memory. When used as program memory, the program must be written to the peripheral RAM beforehand by a program. Program fetches from peripheral RAM are fast, with a 2-byte fetch being executed in 2 clocks. |
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