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UPD784938 Datasheet(PDF) 78 Page - NEC |
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UPD784938 Datasheet(HTML) 78 Page - NEC |
78 / 733 page ![]() 78 CHAPTER 3 CPU ARCHITECTURE Preliminary User’s Manual U13987EJ1V0UM00 3.4.1 Internal RAM area The µPD784938 incorporates general-purpose static RAM. This area is configured as follows: Peripheral RAM (PRAM) Internal RAM area Internal high-speed RAM (IRAM) Table 3-2. Internal RAM Area Internal RAM Internal RAM Area Part Number Peripheral RAM: PRAM Internal High-Speed RAM: IRAM µPD784935 5,120 bytes 4,608 bytes 512 bytes (0EB00H to 0FEFFH) (0EB00H to 0FCFFH) (0FD00H to 0FEFFH) µPD784936 6,656 bytes 6,144 bytes (0E500H to 0FEFFH) (0E500H to 0FCFFH) µPD784937 8,192 bytes 7,680 bytes (0DF00H to 0FEFFH) (0DF00H to 0FCFFH) µPD784938 10,240 bytes 9,728 bytes µPD78F4938 (0D600H to 0FEFFH) (0D600H to 0FCFFH) Remark The addresses in the table are the values that apply when the LOCATION 0 instruction is executed. When the LOCATION 0FH instruction is executed, 0F0000H should be added to the values shown above. |
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